Here is another example of what I’m trying to do:
interface whitebox_if(
output wire sig
);
task drive_if();
force sig = vip.some_value;
endtask
endinterface
module top;
bind inst_dut whitebox_if wb_if( sub_1.sig ); // bind interface to DUT + connect internal signals
initial
uvm_config_db #(virtual whitebox_if)::set(null, “*”, dut.wb_if); // place (bound/buried) interface into database
endmodule