Automatic variables inside static method

SystemVerilog
5

In reply to sriram.seshagiri:

Hi Dave,

I tried this example and, I think I got some better clarity now. So Looks like if you try to access a non static variable inside a static method (static function (static keyword on LHS) of a class type), these variables are not shared among different instances (objects). They are independent of each other and, even when I tried to access using scope resolution it evaluated it independently. But the static variable did get shared by all instances of the class.
Below is the example:__

class base;

static function set (int k);
int j;
static int i;

i++;

$display("Before init value of j");
$display(j);

j=k;
//i = i+j;
$display("value of i"); //i is static var
$display(i);
$display("After init value of j");
$display(j);

endfunction

static function get;

//$display(i);

endfunction

endclass

module automatic test();
initial begin
base b1,b2;
b1 = new();
b2 = new();
repeat(10) begin
b1.set(5);
end
$display(“@@@@”);
b2.set(5);
base::set(0);

Output:

Before init value of j
0
value of i
1
After init value of j
5
Before init value of j
0
value of i
2
After init value of j
5
Before init value of j
0
value of i
3
After init value of j
5
Before init value of j
0
value of i
4
After init value of j
5
Before init value of j
0
value of i
5
After init value of j
5
Before init value of j
0
value of i
6
After init value of j
5
Before init value of j
0
value of i
7
After init value of j
5
Before init value of j
0
value of i
8
After init value of j
5
Before init value of j
0
value of i
9
After init value of j
5
Before init value of j
0
value of i
10
After init value of j
5
@@@@
Before init value of j
0
value of i
11
After init value of j
5
Before init value of j
0
value of i
12
After init value of j
0