In reply to Anudeep J:
Your requirements are not clear.
When we use final or deferred assertion, its the order of execution varies but not sampled value of signals.
Now you say the signals are sampled, meaning you have a controlling clock?
Originally, you wrote
I have a signal “a” which toggles asynchronously. based on signal “a” toggling, signals “b”, “c”, “d” toggles exactly like “a”. There are some signals “x”, “y”, “z” do not affect that is they are stable. How do I write an assertion/checker to check signals “b”, “c”, “d”, “x”, “y”, “z” behaviour based on signal “a”?
What issues you see with
always @(a) begin
a1: assert final (b === c) else $error("error");
a2: assert final (a === c) else $error("error");
end