Assert property( @(posedge a) ##1 @(posedge b) 1)

SystemVerilog
1

I am trying to learn SVA assertions, and I encountered this:
assert property( @(posedge a) ##1 @(posedge b) 1)
What I want to check is that a posedge of b comes after a posedge of a. I am not explicitly reference a clock here, and I don’t care how late this is happening as long as it happens.
So what clock does ##1 from above assertion refers to? Is it the implicitly simulator clock, whatever that is?
And what is a better or a different way to write this expectation?

2 
assert property( @(posedge a) 1 ##1 @(posedge b) 1) // need an expression after posedge a 
/* So what clock does ##1 from above assertion refers to?
In this case, the ##1 refers to the very next posedge b. 
If posedge a occurs in the same edge as posedge b, then we still are 
looking at the very next posedge b

What I want to check is that a posedge of b comes after a posedge of a. */
assert property( @(posedge a) 1 ##1 @(posedge b) 1)
/*That assertion does not do that. That assertion waits for posedge a then wait for a posedge b.
Question: After what conditions?  */
// If I have posedge a the posedge b the posedge a 
//           _<------ pass --------> 
//                         <---------- fail -----> 

// Assuming the triggering condition to test the a then b is posedge c
always @(posedge c) test_t(); 
task automatic test_t(); 
    bit pass_a, pass_b;
    fork
        @(posedge a) pass_a=1;
        @(posedge b) pass_b=1;
    join_any
    am_ab: assert(pass_a && !pass_b)
endtask

en Cohen
Ben@systemverilog.us
Link to the list of papers and books that I wrote, many are now donated.

3

Thank you (also for the alternative) but you modified the assertion saying " // need an expression after posedge a ", and there is no triggering c.
I wrote it without it (without that “1” ), as intended, and is detecting what is intended to my surprise.
I’ve tested this piece:

  logic as_a, as_b;

  initial begin
    as_a = 0;
    as_b = 0;

    #21ns as_a = 1;
    #1ns as_b = 1;
  end

  async_assert: assert property ( @(posedge as_a) ##1 @(posedge as_b) 1)
    $display("PASS %t: assync_assert PASSED", $time);
  else
    $display("FAIL %t: assync_assert FAILED", $time);
4

I think
property ( @(posedge as_a) ##1 @(posedge as_b) 1)
is like
property ( @(posedge as_a) 1 ##1 @(posedge as_b) 1)
Is this a simulator interpretation when missing that 1, or a standard valid syntax?
PS. I ran with questa