In reply to antonio92m:
Hello Antonio,
you can compile any HDL code in Questa. If the code is not simple VHDL or Verilog/SV you need the corresponding libraries, for instance foe Xilinx UDPs.
I’d start to compile the code. The simulator will show you what is missing. I know this is a trial-and-error approach. But I believe this helps you.
Christoph