Alu Instruction Randomization to maximize Hazards

SystemVerilog
2

In reply to Neal:

This code seems to be fine, I have made few modifications such as,

  1. turning off constraint c1 for the first object.
  2. Replaced “i-(Instruction_h[i].Interleaving)”, might cause failure if i < Instruction_h[i].Interleaving.
  3. Additional interleaving constraint so that the address is picked from a previous instruction “Instruction_h[i].Interleaving == i-1; or Instruction_h[i].Interleaving < i”.
  4. Increased “Interleaving” size and removed its base constraint.

Please find the modified code below.

module alu;
 
  class Instruction;
    rand bit [4:0] Rd;
    rand bit [4:0] Rs0;
    rand bit [4:0] Rs1;
    rand enum {Add = 0,Sub,Multiply,Xor,Or,And,Nand,Not,Load,Store} opcode;
    rand enum {RAW =0,WAR,WAW} Hazard;
    rand bit Dependent;
    rand bit [4:0] Interleaving;
    rand bit Rs0_or_Rs1;
    //constraint c {Interleaving inside{[1:7]};}
    constraint c_hazard {Hazard dist {RAW := 7, WAR :=2, WAW := 2};}
    constraint c_dependent {Dependent dist {1 := 80, 0 := 40};}
    bit [31:0] My_Instruction;
 
    function void post_randomize();
      My_Instruction = {opcode,Rd,Rs0,Rs1};
    endfunction
   endclass
 
  class my_alu;
 
    rand Instruction Instruction_h[20];
 
 
  function new();
    foreach (Instruction_h[i])
      Instruction_h[i] = new;
  endfunction
 
  constraint c1{
 
    foreach (Instruction_h[i])
 
      {
        if(i>0) { 
          Instruction_h[i].Interleaving == i-1; //or Instruction_h[i].Interleaving < i
        if(Instruction_h[i].Dependent && Instruction_h[i].Hazard==0)
        {//RAW
          if(Instruction_h[i].Rs0_or_Rs1)
            Instruction_h[i].Rs0==Instruction_h[(Instruction_h[i].Interleaving)].Rd;
          else
            Instruction_h[i].Rs1== Instruction_h[(Instruction_h[i].Interleaving)].Rd;
        }
          else if (Instruction_h[i].Dependent && Instruction_h[i].Hazard==1)
          {//WAR
            if (Instruction_h[i].Rs0_or_Rs1)
              Instruction_h[i].Rd==Instruction_h[(Instruction_h[i].Interleaving)].Rs0;
           else
             Instruction_h[i].Rd==Instruction_h[(Instruction_h[i].Interleaving)].Rs1;
          }
            else if (Instruction_h[i].Dependent && Instruction_h[i].Hazard==2) //WAW
 
              Instruction_h[i].Rd==Instruction_h[(Instruction_h[i].Interleaving)].Rd; 
 
 
  }
      }
      }
 
 
 endclass   
 
 
my_alu my_alu_h;
initial begin
  my_alu_h = new;
  assert (my_alu_h.randomize());
  foreach(my_alu_h.Instruction_h[i]) 
    $display("%p",my_alu_h.Instruction_h[i]);
 end
endmodule