Accessing base class function using derived class object/handle in systemverilog

SystemVerilog
3

You can use “super.” or “base_class_name::” to get access to overridden base class methods (or hidden ones). Example:

class base;
   virtual function void f(); 
   endfunction
endclass

class der extends base;
   virtual function void f();
      super.f();
   endfunction
endclass