System Verilog Strings

Hi,
Using the below code:


string reg_name = "REG_0";
int num_sel = 1;
reg_name.putc((reg_name.len()-1),num_sel);
`uvm_info(get_full_name(),$psprintf("reg_name = %0s ",reg_name),UVM_LOW);

I am expecting the output to be → REG_1
But I get this → REG_^A

Is this not the correct way to use the putc method?

In reply to fenil_shah:

The problem is not with putc(), but the value stored in num_sel. You want the ASCII code for “1”, not the value 1.

If num_sel will only have the values 0-9, you can do

reg_name.putc((reg_name.len()-1),"0"+num_sel);