Scheduling of blocking assignments with intra-assignment delay

SystemVerilog
1

In the context of below code,

module test;
	int a,b;
        initial begin
              a = #2 b;
        end
        initial begin
              #1 b = 20;
        end
        initial begin
             #2
             $display("%0t, a: %0d, b: %0d",$time,a,b);
        end
endmodule

I would like to understand this sentence(quoted below) from section 4.9.3 of LRM 1800-2017.
“The values at the time the process resumes are used to determine the target(s)”

Thank you.

2

In reply to Naveenkb:

The “values” are the ones mentioned in the preceding paragraph, meaning the computation of the RHS at before the the process got suspended.

Note that there is no longer any reason to use blocking assignments with intra-assignment delay. You should be using non-blocking assignments instead.