Same random value as result in code. How do I get different random values?

SystemVerilog
,
1

Here’s the code…

module test;
  typedef struct packed {union packed {bit valid; bit invalid;}coz;
                       bit[8:0]input1;}val; 
  val value1;
  val value2;
class tt;
   rand val val1;
endclass
  initial begin
    tt tt1=new();
    tt tt2=new();
   value1=tt1.randomize();
    value2=tt2.randomize();
    $display("Value in Instruction address is : %b,%b",value1,value2);
  end
endmodule

Here’s the output I am getting…
Value in Instruction address is : 0000000001,0000000001
How do I get different random values for value1 and value2?
Thank you!

2

In reply to murthy1993:

If the randomize method succeeds then it returns a value of 1, else it returns a value of 0. In your code you are displaying the return value of the randomize method, not the randomized variable. To do that you want to access tt1.val1. It is also considered good practice to check the randomize method’s return value in case randomization fails:

if (!tt1.randomize) $error("Unable to randomize tt1.");
3

In reply to sbellock:

Also note that a declaration initialization of an implicitly static variable is illegal in the 1800-2009 and later standards. And even if you moved the declarations of tt1 and tt2 outside the initial block, the order of static variable initializations are undefined. Thus there is no random stability for the class objects you construct. You should write


tt tt1, tt2;
initial begin
    tt1 = new;
    tt2 = new;
    ...