Record all SystemVerilog classes with Questasim

Is there a way to somehow log ALL SystemVerilog classes in the testbench to wlf(waveform) file without specifying each of them manually in QuestaSim 10.7c? The question is related to a non-UVM testbench, just a regular SystemVerilog classes.

For example when you are using Cadence Incisive you just need to specify the -dynamic key to a probe command and it will save all classes, queues, dynamic and associative arrays in the testbench and you don’t need to specify each class separately to be probed. Does the QuestaSim has some similar opportunity?

In reply to MrSergio:
This Mentor/Siemens EDA sponsored public forum is not for discussing tool specific usage or issues. Please read your tool’s user manual or contact your tool vendor directly for support.