Randc on a struct isn't giving expected results

SystemVerilog
,
1

Hi All,

I had to randomize 2 variables in a cyclic fashion (the combination of the numbers is unique). However, I don’t see the expected values. This is what I have so far :

typedef struct packed{
  bit[15:0] idx;
  bit[15:0] idy;
} s_index;

class demo_class;
  randc s_index id;
  
  constraint c_unique{
    id.idx < 5;
    id.idy < 5;
  }
  
  task pass_list();
    
    repeat(25)begin
      void'(randomize());
      $display(id.idx, id.idy);
    end
  endtask
  
  
endclass

module top();
  demo_class dc;
  
  initial begin
    dc = new;
    
    dc.pass_list();
  end
  
  
endmodule

When I run the above code, I see the following output :
0 4
2 1
0 4
0 2
4 0
0 4
4 4
3 1
1 3
0 3
4 4
4 0
3 4
0 0
0 0
4 4
3 1
3 1
0 0
3 0
1 1
3 4
4 4
2 4
0 3

Clearly, I see that the output is being repeated. Can you tell me where did I go wrong? Is this the right way to use a ‘randc’ on a struct?

Thanks,
Sai

2

In reply to szy0014:

Can you tell me where did I go wrong?

You chose the wrong simulator. Report the problem to your vendor and try a different tool.

3

In reply to dave_59:

This worked when I changed the tool.