If i change the name of class "array" to "arr" i dont get error, so why i cant use class name as "array"?

class array;
randc byte dyn; //unique value
rand byte dynamic; //without unique

constraint c1{foreach(dyn[i]) dyn[i] inside{[1:50]};}
constraint c2{dyn.size==50;}
constraint c3{foreach(dynamic[i]) dynamic[i] inside{[20:60]};}
constraint c4{dynamic.size==50;}
endclass

module ex;
array p=new();

initial begin
repeat(2) begin
p.randomize();
$display(“size of dyn and dynamic arr”,p.dyn.size(),p.dynamic.size());
foreach(p.dyn[i]) $display(“addr=%0d data=%0d”,p.dyn[i],p.dynamic[i]);
end

end
endmodule

In reply to swapnilsrf9:

Above code works fine. See Edit code - EDA Playground Which Simulator are you using?

In reply to mayurkubavat:

the tool i am using is synopsys vcs version 2013.06
why it is showing error in my tool

In reply to swapnilsrf9:

‘array’ is not listed in the SystemVerilog LRM as a reserved keyword and should be a valid class name. Please contact your tool vendor directly for support issues.