Dynamically Resizing arrays @ Scoreboard!

SystemVerilog
1

All,

@ Scoreboard, need a help to manipulate data stream of different sizes.

Need to convert and compare Output data 32 bits array to input data 128 bits array

'hFACE_CAFE
'hDADA_BEBE
'hFEED_FADE
'hDEAD_BEEF
…

into

`hFACE_CAFE_DADA_BEBE_FEED_FADE_DEAD_BEEF
…

Catch is both are flexible. And one input array of data may be received as multiple output data array of smaller sizes.

Input data arrays can 128, 64 ,32

when i/p data array is 128…Output array 128,64,32
when i/p data array is 64…Output array 64,32
when i/p data array is 32…Output array 32

How to simplify logic?

John

2

In reply to John Verif:
You can use a bit-stream cast to convert your data into a common type and then compare them. It looks like the best common type for your data would be a dynamic array of 32-bit words.

module top;
   typedef logic [31:0] uint32_t;
   typedef logic [63:0] uint64_t;
   typedef logic [127:0] uint128_t;

   typedef  uint32_t uint32_array_t[]; // common type
   typedef  uint64_t uint64_array_t[];
   typedef  uint128_t uint128_array_t[];

   uint128_t      input_data_128;
   uint32_array_t output_data_32;
   uint64_array_t output_data_64;

   initial begin
      input_data_128 = 'hFACE_CAFE_DADA_BEBE_FEED_FADE_DEAD_BEEF;
      output_data_32 = {
			'hFACE_CAFE,
			'hDADA_BEBE,
			'hFEED_FADE,
			'hDEAD_BEEF
			};

      if (uint32_array_t'(input_data_128) == output_data_32)
	$info("match");
      else
	$error("no match");
      output_data_64 = {'hFACE_CAFE_DADA_BEBE,
			'hFEED_FADE_DEAD_BEEF};
      
      if (uint32_array_t'(input_data_128) == uint32_array_t'(output_data_64))
	$info("match");
      else
	$error("no match");
 
 end
endmodule : top
3

In reply to dave_59:

Thanks Dave.

I’m doing as below to convert AHB/AXI trans data into bytes format.

case (tr.wstrb[j])
								  																				'h7	:	begin mstr_data_24 = new[1]; mstr_data_24[0] = tr.data[j][23:0]; master_byte_mem = {uint8_array_t'(mstr_data_24),master_byte_mem}; mstr_data_24.delete(); end
								  																				'h9	:	begin mstr_data_24 = new[1]; mstr_data_24[0] = {tr.data[j][31:15],tr.data[j][7:0]}; master_byte_mem = {uint8_array_t'(mstr_data_24),master_byte_mem}; mstr_data_24.delete(); end
								  																				'hc	:	begin mstr_data_24 = new[1]; mstr_data_24[0] = tr.data[j][31:8]; master_byte_mem = {uint8_array_t'(mstr_data_24),master_byte_mem}; mstr_data_24.delete(); end
								  																				'hf	:	begin mstr_data_32 = new[1]; mstr_data_32[0] = tr.data[j][31:0]; master_byte_mem = {uint8_array_t'(mstr_data_32),master_byte_mem}; mstr_data_32.delete(); end
		
endcase

Is there any better way / simplified code to do that?

John