Constraints

SystemVerilog
1 
   Hello All,

                class check;
                    rand int a;
                endclass

               Write constraint to generate random values 25,27,30,36,40,45 for the integer "a" without using "set membership".
2

In reply to Rakesh Kumar S:

What is your question?

3

How to write constraint for the above question??

4

In reply to Rakesh Kumar S:

Do you know how to write an equation that would be true if ‘a’ was equal to one of those values?

5

Not exactly…but those are multiples of 5 and 9…
Is this constraints are correct for the given question??
If not please correct it…

Constraint c1{a>=25,a<=45;}
Constraint c2{a%=5,a%=9;}

6

In reply to Rakesh Kumar S:

That was a good guess. Individual constraints get ANDed together. You want to OR the last two.

constraint c1{a>=25; a<=45;}
constraint c2{a%5==0 || a%9==0;}

or as one equation

constraint c1{ a>=25 && a<=45 && (a%5==0 || a%9==0)}
7

In reply to dave_59:

There is an unexpected value of a that actually meets the constraint condition above: a = 35.

8

In reply to chris_le:

If we are looking for numbers which are multiples of 5 or multiples of 9, I guess 35 is a valid outcome.

So, I’m guessing OP just forgot to add it in his list.