Configuration class in VIP environment

SystemVerilog
1

(i) What is the use of configuration class in VIP environment?
(ii) Which things can be controlled using configuration class?
(iii) How to write configuration class using systemverilog?

2
  1. instead passing configuration values for each configuration parameters, better to encapsulate each parameters inside a configuration object which can be passed through any testbench components or objects. This ideology helpful for to have compact code and better debugging.
  2. whatever you wants can be controlled.few of which are: you control the agent behaviour i.e.e active or passive, you can pass virtual interface handle to driver and monitor component, you can pass the address range that agent should support. And many more based on your requirements.
3

In reply to Kishan_123:
https://verificationacademy.com/cookbook/configuration

4

Thanks Ravi,
and can we write configuration class using systemverilog? can you give small example.

5

In reply to Kishan_123:

yeah definitely, we can write:


class apb_agent_config;
    ...
    ...
    virtual apb_if APB;

    // Is the agent active or passive
    bit is_active

    bit has_functional_coverage = 0;
    ...
    ...
endclass