This bit provides a filtering mechanism for fields.
bit abstract = 1
This bit provides a filtering mechanism for fields.
bit abstract
This bit provides a filtering mechanism for fields.
bit abstract = 1
If set, check the HDL paths for the specified design abstractions.
string abstractions[$]
This function marks the acceptance of a transaction, tr, by this component.
function void accept_tr ( uvm_transaction tr, time accept_time = )
Calling accept_tr indicates that the transaction item has been received by a consumer component.
function void accept_tr ( time accept_time = )
The adapter used to convey the parameters of a bus operation in terms of a canonical uvm_reg_bus_op datum.
uvm_reg_adapter adapter
Adapter to use for translating between abstract register transactions and physical bus transactions, defined only when this sequence is a translation sequence.
uvm_reg_adapter adapter
Registers the given callback object, cb, with the given obj handle.
static function void add( T obj, uvm_callback cb, uvm_apprepend ordering = UVM_APPEND )
Add a single component to the set of components to be monitored.
function void add ( uvm_component comp )
Build up a schedule structure inserting phase by phase, specifying linkage
function void add( uvm_phase phase, uvm_phase with_phase = null, uvm_phase after_phase = null, uvm_phase before_phase = null )
Adds the given (key, item) pair to the pool.
virtual function void add ( KEY key, T item )
Add this callback to the specified register and its contained fields.
static function void add( uvm_reg rg )
Add this callback to the specified register and its contained fields.
static function void add( uvm_reg rg )
Registers the given callback object, cb, with one or more uvm_components.
static function void add_by_name( string name, uvm_callback cb, uvm_component root, uvm_apprepend ordering = UVM_APPEND )
Registers a callback object, cb, with this event.
virtual function void add_callback ( uvm_event_callback cb, bit append = 1 )
Specify that additional coverage models are available.
virtual protected function void add_coverage( uvm_reg_cvr_t models )
Specify that additional coverage models are available.
virtual protected function void add_coverage( uvm_reg_cvr_t models )
Specify that additional coverage models are available.
virtual protected function void add_coverage( uvm_reg_cvr_t models )
Add an HDL path
function void add_hdl_path ( uvm_hdl_path_slice slices[], string kind = "RTL" )
Add an HDL path
function void add_hdl_path ( uvm_hdl_path_slice slices[], string kind = "RTL" )
Add an HDL path
function void add_hdl_path ( string path, string kind = "RTL" )
Add an HDL path
function void add_hdl_path ( string path, string kind = "RTL" )
Add the specified HDL slice to the HDL path for the specified design abstraction.
function void add_hdl_path_slice( string name, int offset, int size, bit first = 0, string kind = "RTL" )
Append the specified HDL slice to the HDL path of the register instance for the specified design abstraction.
function void add_hdl_path_slice( string name, int offset, int size, bit first = 0, string kind = "RTL" )
Add a memory
virtual function void add_mem ( uvm_mem mem, uvm_reg_addr_t offset, string rights = "RW", bit unmapped = 0, uvm_reg_frontdoor frontdoor = null )
Append the specified path to the path concatenation, for the specified number of bits at the specified offset.
function void add_path( string path, int unsigned offset = -1, int unsigned size = -1 )
Add a register
virtual function void add_reg ( uvm_reg rg, uvm_reg_addr_t offset, string rights = "RW", bit unmapped = 0, uvm_reg_frontdoor frontdoor = null )
Append the specified slice literal to the path concatenation
function void add_slice( uvm_hdl_path_slice slice )
Add an address map
virtual function void add_submap ( uvm_reg_map child_map, uvm_reg_addr_t offset )
Appends to the given schedule the built-in UVM phases.
static function void add_uvm_phases( uvm_phase schedule )
The bus address.
uvm_reg_addr_t addr
Prints a field’s name, or id, which is the full instance name.
virtual protected function string adjust_name ( string id, byte scope_separator = "." )
Executes the uvm_objection_callback::all_dropped task in the user callback class whenever the objection count for this objection in reference to obj goes to zero.
virtual task all_dropped ( uvm_object obj, uvm_object source_obj, string description, int count )
The all_droppped callback is called when all objections have been dropped by this component and all its descendants.
virtual task all_dropped ( uvm_objection objection, uvm_object source_obj, string description, int count )
Objection callback that is called when a drop_objection has reached obj, and the total count for obj goes to zero.
virtual task all_dropped ( uvm_object obj, uvm_object source_obj, string description, int count )
Objection all_dropped callback function.
virtual task all_dropped ( uvm_objection objection, uvm_object obj, uvm_object source_obj, string description, int count )
Randomly implement, resize or relocate a virtual register array
virtual function uvm_mem_region allocate( longint unsigned n, uvm_mem_mam mam )
Searches for all config settings matching this component’s instance path.
virtual function void apply_config_settings ( bit verbose = )
Execute a blocking transaction.
virtual task b_transport( T t, uvm_tlm_time delay )
Return the backdoor pseudo-map singleton
static function uvm_reg_map backdoor()
User-define backdoor read access
virtual protected task backdoor_read( uvm_reg_item rw )
User-define backdoor read access
virtual task backdoor_read( uvm_reg_item rw )
User-defined backdoor read access
virtual function uvm_status_e backdoor_read_func( uvm_reg_item rw )
User-defined backdoor read access
virtual function uvm_status_e backdoor_read_func( uvm_reg_item rw )
User-defined DUT register change monitor
virtual task backdoor_watch()
User-defined backdoor read access
virtual task backdoor_write( uvm_reg_item rw )
User-defined backdoor read access
virtual task backdoor_write( uvm_reg_item rw )
If path is UVM_BACKDOOR, this member specifies the abstraction kind for the backdoor access, e.g.
string bd_kind
This function marks the start of a child transaction, tr, by this component.
function integer begin_child_tr ( uvm_transaction tr, integer parent_handle = 0, string stream_name = "main", string label = "", string desc = "", time begin_time = 0 )
This function indicates that the transaction has been started as a child of a parent transaction given by parent_handle.
function integer begin_child_tr ( time begin_time = 0, integer parent_handle = 0 )
Defines the number of elements at the head of a list to print.
int begin_elements = 5
A uvm_event that is triggered when this transaction’s actual execution on the bus begins, typically as a result of a driver calling uvm_component::begin_tr.
uvm_event begin_event
This function marks the start of a transaction, tr, by this component.
function integer begin_tr ( uvm_transaction tr, string stream_name = "main", string label = "", string desc = "", time begin_time = 0, integer parent_handle = 0 )
This function indicates that the transaction has been started and is not the child of another transaction.
function integer begin_tr ( time begin_time = )
This bit determines the order that integral data is packed (using pack_field, pack_field_int, pack_time, or pack_real) and how the data is unpacked from the pack array (using unpack_field, unpack_field_int, unpack_time, or unpack_real).
bit big_endian = 1
This string should be prepended to the value of an integral type when a radix of UVM_BIN is used for the radix of the integral object.
string bin_radix = "'b"
Execute the Memory Access sequence.
virtual task body()
Performs the walking-ones algorithm on each map of the memory specifed in mem.
virtual task body()
Executes the mem walk sequence, one block at a time.
virtual task body()
Executes the Register Access sequence.
virtual task body()
Executes the Register Bit Bash sequence.
virtual task body()
Executes the Hardware Reset sequence.
virtual task body()
Executes any or all the built-in register and memory sequences.
virtual task body()
Executes the Shared Register and Memory sequence
virtual task body()
Continually gets a register transaction from the configured upstream sequencer, reg_seqr, and executes the corresponding bus transaction via do_rw_access.
virtual task body()
This is the user-defined task where the main sequence code resides.
virtual task body()
Check if all of the specified coverage model must be built.
protected function uvm_reg_cvr_t build_coverage( uvm_reg_cvr_t models )
Check if all of the specified coverage models must be built.
protected function uvm_reg_cvr_t build_coverage( uvm_reg_cvr_t models )
Check if all of the specified coverage model must be built.
protected function uvm_reg_cvr_t build_coverage( uvm_reg_cvr_t models )
The uvm_build_phase phase implementation method.
virtual function void build_phase( uvm_phase phase )
Read values from memory locations
virtual task burst_read( output uvm_status_e status, input uvm_reg_addr_t offset, ref uvm_reg_data_t value[], input uvm_path_e path = UVM_DEFAULT_PATH, input uvm_reg_map map = null, input uvm_sequence_base parent = null, input int prior = -1, input uvm_object extension = null, input string fname = "", input int lineno = 0 )
Read from a set of memory location in the region.
task burst_read( output uvm_status_e status, input uvm_reg_addr_t offset, output uvm_reg_data_t value[], input uvm_path_e path = UVM_DEFAULT_PATH, input uvm_reg_map map = null, input uvm_sequence_base parent = null, input int prior = -1, input uvm_object extension = null, input string fname = "", input int lineno = 0 )
Write the specified values in memory locations
virtual task burst_write( output uvm_status_e status, input uvm_reg_addr_t offset, input uvm_reg_data_t value[], input uvm_path_e path = UVM_DEFAULT_PATH, input uvm_reg_map map = null, input uvm_sequence_base parent = null, input int prior = -1, input uvm_object extension = null, input string fname = "", input int lineno = 0 )
Write to a set of memory location in the region.
task burst_write( output uvm_status_e status, input uvm_reg_addr_t offset, input uvm_reg_data_t value[], input uvm_path_e path = UVM_DEFAULT_PATH, input uvm_reg_map map = null, input uvm_sequence_base parent = null, input int prior = -1, input uvm_object extension = null, input string fname = "", input int lineno = 0 )
Observed bus transactions of type BUSTYPE are received from this port and processed.
uvm_analysis_imp #( BUSTYPE, uvm_reg_predictor #(BUSTYPE) ) bus_in
Extensions of this class must implement this method to copy members of the given bus-specific bus_item to corresponding members of the provided bus_rw instance.
pure virtual function void bus2reg( uvm_sequence_item bus_item, ref uvm_reg_bus_op rw )
Converts a uvm_tlm_gp item to a uvm_reg_bus_op.
virtual function void bus2reg( uvm_sequence_item bus_item, ref uvm_reg_bus_op rw )
Enables for the byte lanes on the bus.
uvm_reg_byte_en_t byte_en
Enable/disable callbacks (modeled like rand_mode and constraint_mode).
function bit callback_mode( int on = -1 )
Returns 1 if a new transaction can be provided immediately upon request, 0 otherwise.
virtual function bit can_get()
Returns 1 if a new transaction is available; 0 otherwise.
virtual function bit can_peek()
Returns 1 if the component is ready to accept the transaction; 0 otherwise.
virtual function bit can_put()
Decrements the waiter count by one.
virtual function void cancel ()
Decrements the number of waiters on the event.
virtual function void cancel ()
The maximum number of entries, or depth, of the FIFO.
function int unsigned capacity()
This is the method that is called for each registered report catcher.
pure virtual function action_e catch()
Check all configuration settings in a components configuration table to determine if the setting has been used, overridden or not used.
function void check_config_usage ( bit recurse = 1 )
Check that the specified data width (in bits) is less than or equal to the value of `UVM_REG_DATA_WIDTH
protected static function bit check_data_width( int unsigned width )
The uvm_check_phase phase implementation method.
virtual function void check_phase( uvm_phase phase )
Checks that no pending register transactions are still enqueued.
virtual function void check_phase( uvm_phase phase )
This bit determines whether the type, given by uvm_object::get_type_name, is used to verify that the types of two objects are the same.
bit check_type = 1
Immediately clears the objection state.
virtual function void clear( uvm_object obj = null )
Remove the instance-specific extension bound under the specified key.
function void clear_extension( uvm_tlm_extension_base ext_handle )
Remove all instance-specific extensions
function void clear_extensions()
Delete HDL paths
function void clear_hdl_path ( string kind = "RTL" )
Delete HDL paths
function void clear_hdl_path ( string kind = "RTL" )
Delete HDL paths
function void clear_hdl_path ( string kind = "RTL" )
Delete HDL paths
function void clear_hdl_path ( string kind = "RTL" )
Empties the response queue for this sequence.
virtual function void clear_response_queue()
The clone method creates and returns an exact copy of this object.
virtual function uvm_object clone ()
Deep compares members of this data object with those of the object provided in the rhs (right-hand side) argument, returning 1 on a match, 0 othewise.
function bit compare ( uvm_object rhs, uvm_comparer comparer = null )
Compares two integral values.
virtual function bit compare_field ( string name, uvm_bitstream_t lhs, uvm_bitstream_t rhs, int size, uvm_radix_enum radix = UVM_NORADIX )
This method is the same as compare_field except that the arguments are small integers, less than or equal to 64 bits.
virtual function bit compare_field_int ( string name, logic[63:0] lhs, logic[63:0] rhs, int size, uvm_radix_enum radix = UVM_NORADIX )
This method is the same as compare_field except that the arguments are real numbers.
virtual function bit compare_field_real ( string name, real lhs, real rhs )
Compares two class objects using the policy knob to determine whether the comparison should be deep, shallow, or reference.
virtual function bit compare_object ( string name, uvm_object lhs, uvm_object rhs )
Compares two string variables.
virtual function bit compare_string ( string name, string lhs, string rhs )
Constructs the actual string sent to the file or command line from the severity, component name, report id, and the message itself.
virtual function string compose_message( uvm_severity severity, string name, string id, string message, string filename, int line )
Instance-specific configuration
function void configure ( uvm_reg_block parent, string hdl_path = "" )
Instance-specific configuration
function void configure ( uvm_reg_block blk_parent, uvm_reg_file regfile_parent = null, string hdl_path = "" )
Instance-specific configuration
function void configure( uvm_reg_block parent = null, string hdl_path = "" )
Instance-specific configuration
function void configure( uvm_reg parent, int unsigned size, int unsigned lsb_pos, string access, bit volatile, uvm_reg_data_t reset, bit has_reset, bit is_rand, bit individually_accessible )
Configure a register file instance
function void configure ( uvm_reg_block blk_parent, uvm_reg_file regfile_parent, string hdl_path = "" )
Configure the indirect data register.
function void configure ( uvm_reg idx, uvm_reg reg_a[], uvm_reg_block blk_parent, uvm_reg_file regfile_parent = null )
Instance-specific configuration
function void configure( uvm_reg_block parent, uvm_reg_addr_t base_addr, int unsigned n_bytes, uvm_endianness_e endian, bit byte_addressing = 1 )
Instance-specific configuration
function void configure( uvm_reg_block parent, uvm_mem mem = null, longint unsigned size = 0, uvm_reg_addr_t offset = 0, int unsigned incr = 0 )
Instance-specific configuration
function void configure( uvm_vreg parent, int unsigned size, int unsigned lsb_pos )
The uvm_configure_phase phase implementation method.
virtual task configure_phase( uvm_phase phase )
Connects this port to the given provider port.
virtual function void connect ( this_type provider )
Connect this socket to the specified uvm_tlm_nb_initiator_socket
function void connect( this_type provider )
Connect this socket to the specified uvm_tlm_nb_initiator_socket
function void connect( this_type provider )
The uvm_connect_phase phase implementation method.
virtual function void connect_phase( uvm_phase phase )
Image of the state of the manager
function string convert2string()
This virtual function is a user-definable hook, called directly by the user, that allows users to provide object information in the form of a string.
virtual function string convert2string()
Returns a string showing the contents of this transaction.
virtual function string convert2string()
The copy makes this object a copy of the specified object.
function void copy ( uvm_object rhs )
Returns an instance of the component type, T, represented by this proxy, subject to any factory overrides based on the context provided by the parent’s full name.
static function T create( string name, uvm_component parent, string contxt = "" )
The create method allocates a new object of the same type as this object and returns it via a base uvm_object handle.
virtual function uvm_object create ( string name = "" )
Returns an instance of the object type, T, represented by this proxy, subject to any factory overrides based on the context provided by the parent’s full name.
static function T create ( string name = "", uvm_component parent = null, string contxt = "" )
virtual function uvm_object create ( string name = "" )
A convenience function for uvm_factory::create_component_by_name, this method calls upon the factory to create a new child component whose type corresponds to the preregistered type name, requested_type_name, and instance name, name.
function uvm_component create_component ( string requested_type_name, string name )
Creates a component of type T having the provided name and parent.
virtual function uvm_component create_component ( string name, uvm_component parent )
Creates a new component, passing to its constructor the given name and parent.
virtual function uvm_component create_component ( string name, uvm_component parent )
Creates and returns a component or object of the requested type, which may be specified by type or by name.
function uvm_component create_component_by_name ( string requested_type_name, string parent_inst_path = "", string name, uvm_component parent )
function uvm_component create_component_by_type ( uvm_object_wrapper requested_type, string parent_inst_path = "", string name, uvm_component parent )
Create_item will create and initialize a sequence_item or sequence using the factory.
protected function uvm_sequence_item create_item( uvm_object_wrapper type_var, uvm_sequencer_base l_sequencer, string name )
Create an address map in this block
virtual function uvm_reg_map create_map( string name, uvm_reg_addr_t base_addr, int unsigned n_bytes, uvm_endianness_e endian, bit byte_addressing = 1 )
A convenience function for uvm_factory::create_object_by_name, this method calls upon the factory to create a new object whose type corresponds to the preregistered type name, requested_type_name, and instance name, name.
function uvm_object create_object ( string requested_type_name, string name = "" )
Creates an object of type T and returns it as a handle to an uvm_object.
virtual function uvm_object create_object( string name = "" )
Creates a new object with the optional name.
virtual function uvm_object create_object ( string name = "" )
function uvm_object create_object_by_name ( string requested_type_name, string parent_inst_path = "", string name = "" )
function uvm_object create_object_by_type ( uvm_object_wrapper requested_type, string parent_inst_path = "", string name = "" )
Returns a reference to the sequence that currently has a lock or grab on the sequence.
virtual function uvm_sequence_base current_grabber()