In reply to dave_59:
In reply to Reuben:
One reason for the lack of resources on GLS is the fact that there are so few people left doing it. FPGAs can no longer be represented accurately for GLS, and formal tools handle gate-level topologies with much better accuracy.
Hi Dave,
Is there a tutorial explaining formal Vs dynamic simulation for GLS. What are benefits of using one over another for design types.