SVA local variable assignment are not supported within first_match

SystemVerilog
1

Hi,
I am working on one assertions and I used ben2’s Dynamic delays and repeats solution ,But my Formal tools(jg) get error
logs:ERROR(EOBS012): Local variable assignments are not supported within first_math…
I have written the below assertion.

import sva_delay_repeat_pkg::*;
module x_fv;
   assert property (@(posedge clk) 
   $rose(enable) |=> dynamic_delay(cfg_dly) ##1 $rose(out_rst));
endmodule

pakage from ben2,thx a lot : )

package sva_delay_repeat_pkg;
 sequence dynamic_repeat(q_s, count);
 int v=count;
 (1, v=count) ##0 first_match((q_s, v=v-1'b1) [*1:$] ##0 v<=0);
 endsequence

 sequence dynamic_delay(count);
 int v;
 (1, v=count) ##0 first_match((1, v=v-1'b1) [*0:$] ##1 v<=0);
 endsequence
endpackage

Can someone help ? THX

2