Questions on Cadence reg_mem package

OVM
1

Is anyone use the SV reg_mem package from Cadence? I am trying to integrate it into my environment and have a few questions.

  1. Is there a way to model a memory that’s mapped into the same register file as other registers? The document makes mention of a sparse memory model but I don’t see any support for this in the code. In my case I have a 256x32 bit RAM that looks like 256 registers of the same type. Is there a recommended way to handle this?

  2. Can someone explain what the point of the address maps are? If a reg file can contain other reg files, why is another layer required?

Thanks
Doug

2

Hello Doug,

Responses per your numbering:

  1. With currently support capability, you would create the appropriate register type and add it at each location of the memory (a register at each address). The sparse memory modeling support should be available soon.

  2. Two basic top level reasons:
    __a: Address maps are meant to model address spaces that can contain memories, register files and registers. Register files are meant moreso to model devices and since devices can contain many different groups of registers, register files can contain other register files.
    __b: IP-XACT also distinguishes between the two concepts so it was important to align in the package. Granted, the package does allow greater flexibility than an IP-XACT description.

John

3

Dear John,

I still have a question about rgm_mem package. I use Questa simulator, and I have tried the xbus example in this package, It run ok. But I don’t know whether the backdoor operation can be supported and how we need to do in the third party simulator such as questa. If I compile the dpi c source file with questa, will the backdoor function work? Thanks much!

kingson

4

John,

Thanks for the info - when do you think the sparse memory will be available? Within a month or so?

Also, what’s the support channel (if any) for the REG_MEM package? Sourcelink, my local AE, this forum? I ran into a problem where something caused and infinite loop in the package (on a register update) and could not figure it out what was going on from looking at the source. I got around that specific problem but would like to understand it so it can be fixed.

Thanks,
Doug