| Contributor: | Jeremy Ralph | |
| Date: | December 11, 2008 | |
| Description: | PDTi SystemVerilog Register Abstraction (SVRA)PDTi SystemVerilog Register Abstraction (SVRA), for the Open Verification Methodology (OVM) was featured in Mentor Graphics' 2008 third quarter Verification Horizons newsletter. This contributed file is a PDF of the article. SVRA is now available for the latest OVM. SpectaReg single-source auto-generates SVRA along with other critical deliverables like Verilog, VHDL, firmware, documentation, and more. If there is interest from the OVM community we will consider contributing SVRA to OVM as part of any upcoming OVM register standard. You can try SpectaReg and the auto-generated SVRA for yourself by signing up at http://spectareg.com. |
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| Download: | SystemVerilog-Register-Abstraction_0.pdf |