Initialization a variable

I defined the result variable in the function in the tb module.
When I initialize this variable with 0 value, I face with this Error:

(vlog-2244) Variable ‘result’ is implicitly static. You must either explicitly declare it as static or automatic
or remove the initialization in the declaration of variable.
Why I can’t initialize this variable?

  function int do_compare(byte_que h, byte_que g);
     int result = 0;
     int sum_err;
     if(h.size() != g.size())begin
       $display("Error in cut functions");
     end
     else if(h.size() == 0) begin
       $display("output file is completely different from input file");
     end
     else begin
       foreach(h[i])
         if(h[i] != g[i])begin
           sum_err++;
         end
       result = (h.size()-sum_err)/h.size()*100;
     end
 
     return result;
   endfunction

See

Function arguments not initializing variable inside the body

The life of a SystemVerilog variable

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