Hi,guys,
When I try to implement firmware-hardware co-sim, a question comes out. In our firmware, it need to
maintain a database cooperating with real-time asic inputs to decide how to configure the chip.
In c side, I need to call verilog task to configure the register, but how can I do in verilog/sv testbench side
to call c function because c function is called and finished consuming no time. So I don’t know how to
maintain the database in firmware.
Any suggestions will be greatly appreciated, thanks in advance
sniper