Execution flow of constraints

SystemVerilog
1 
class ahb_burst;
  rand int unsigned start_address;
  rand int unsigned Haddr;
  rand bit [2:0] Htrans;
  rand bit [1:0] Hsize;
  typedef enum{SINGLE=0,UNDEFINED=1,INCR4=2,WRAP4=3,INCR8=4,WRAP8=5,INCR16=6,WRAP16=7} burst_type;
  rand burst_type type_of_transfer;
  rand bit [5:0] beats;
  
  function int unsigned lower_boundary();
    if(start_address%(1<<Hsize)==0)
      return (start_address-(start_address%((1<<Hsize)*beats)));
    else
      $display("unaligned transfer");
  endfunction
       
  function int unsigned upper_boundary();
    if(start_address%(1<<Hsize)==0)
      return (lower_boundary+(1<<Hsize)*beats);
  endfunction
       
  function static int unsigned Haddr_dup();
    if(Htrans==0)
      return (0);
    else if(Htrans==1) begin
      return (start_address);
    end
    else if(Htrans==2) begin
      if(type_of_transfer.name=="WRAP4"||type_of_transfer.name=="WRAP8"||type_of_transfer.name=="WRAP16") begin
        if(Haddr_dup==(upper_boundary-1<<Hsize))
          return (lower_boundary);
        else
          return (Haddr_dup+(1<<Hsize));
      end
      else if(type_of_transfer.name=="INCR4"||type_of_transfer.name=="INCR8"||type_of_transfer.name=="INCR16"||type_of_transfer.name=="SINGLE")
        return (Haddr_dup+(1<<Hsize));
    end
    else
      return (Haddr_dup);
  endfunction
  
  //constraint initial_address{start_address inside {[0:4096]};(start_address%(1<<Hsize))==0;}
  constraint wrap_up{Haddr==Haddr_dup;}
  //constraint o{solve initial_address before wrap_up;}
  constraint bytes_per_transfer{type_of_transfer==0->beats==1;
                                (type_of_transfer==2|| type_of_transfer==3)->beats==4;
                                (type_of_transfer==4|| type_of_transfer==5)->beats==8;
                                (type_of_transfer==6|| type_of_transfer==7)->beats==16;}
endclass

module test;
  ahb_burst transfer;
  initial begin
    transfer=new;
    assert(transfer.randomize() with {transfer.Htrans==1;Hsize==1;start_address==32'd48;type_of_transfer==3;});
         $display("transfer information=%p,upper_boundary=%0d,lower_boundary=%0d",transfer,transfer.upper_boundary,transfer.lower_boundary);

  end
endmodule

i am just trying explore little deep into ahb and sv so,
i am just trying to generate random address and wanted to observe burst calculations,
But here if i give start address from inline constraint, my haddr is getting the value when htrans==1,but if i write separate constraint then it is not loading into haddr can any one explain this behavior please?

when i specify assert(randomize.transfer with start.address==32’d48;}
result:
transfer information='{start_address:48, **Haddr:48**, Htrans:1, Hsize:1, type_of_transfer:WRAP4, beats:4},upper_boundary=56,lower_boundary=48

when i am writing separate constriant for start_address
result:
transfer information='{start_address:3922, **Haddr:0**, Htrans:1, Hsize:1, type_of_transfer:WRAP4, beats:4},upper_boundary=3928,lower_boundary=3920

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Thanks dave