Crossing a coverpoint and a logical expession

Coverage
,
1

Hi,

I am relatively new to writing cross coverage. I have a few interface signals and an logical expression of two. When I try to cross a coverpoint with this logical expression, it never hits although I can see all the signal alignment. My code is something like this:

class cov_A extends chk_A_base;
   virtual if_A_chk RTL;
   logic A;
   logic [1:0] B;
   logic [1:0] C;

   A = RTL.pck.sig_A && RTL.pck.sig_B;
   B = {RTL.pck.sig_C, RTL.pck.sig_D};
   C <= B;

covergroup cg_X;
   coverpoint A;
   cross A, C;
engroup
endclass;

I understand that the cross will generate implicit coverpoints for A and C. All though I can see the inidividual coverpoints hitting and I can also verify that all the signals are aligned, I cannot see the cross hitting.
When I change the cross to something like this:

   cross A, RTL.pck.sig_C;

this works alright.

Can someone please tell me what is happened? It doesnt look like nested coverpoint to me. Is it something to do with implicit coverpoints generated by the crossing?

Thank you,
Shubha

2

In reply to shubha987:
I think your issue has more to do with how your coverpoints, implicit or explicit, are sampled. You need to show us how the covergroup gets sampled in relation to how the values you are sampling get updated. From the bits of code you have shown you are doing a non-blocking assignment to C, and it’s possible C has not updated at the point you do the sample.

3

In reply to dave_59:

This is the code with sampling in it.

class cov_A extends chk_A_base;
   virtual if_A_chk RTL;
   logic A;
   logic [1:0] B;
   logic [1:0] C;
 
task main();
  super.main();
  initialize();
  forever begin @(RTL.pck);
    A = RTL.pck.sig_A && RTL.pck.sig_B;
    B = {RTL.pck.sig_C, RTL.pck.sig_D};
    C <= B;
   if (RTL.pck) begin
     if (cg_X != null) cg_X.sample();
     end
   end //forever
endtask
 
covergroup cg_X;
   coverpoint A;
   cross A, C;
engroup
endclass;