Code coverage vs Functional Coverage

Hi All,

Can any body describes the difference between

Code Coverage vs Functinal Coverage

Which is more important and Why we need them.

1 Like

Hi,

These coverage goals will give the measure of completeness of verification.

Code coverage: This will give information about how many lines are exected, how many times expressions, branches executed. This coverage is collected by the simulation tools. Users use this coverage to reach those corner cases which are not hit by the random testcases. Users have to write the directed testcases to reach the missing code covearage areas.

Functional coverage: This coverage will be defined by the user. User will define the coverage points for the functions to be covered in DUT. This is completly under user control.

Both of them have equal importance in the verification. 100% functional coverage does not mean that the DUT is completly exercised and vice-versa. Verification engineers will consider both coverages to measure the verifcation progress.

-raja

Hi,

Well, I would like to explain this difference with a simple example.

Let’s say, the spec talks about 3 features, A, B, and C.
And let’s say that the RTL designed coded only feature A and B.

If the test exercises only feature A and B, then you can 100% code coverage.

Thus, even if you have 100% code coverage, you have a big hole (feature C) in the design.

So, the verif engr, has to write funcitonal coverage code for A, B and C.
And 100% functional coverage means, there are tests for all the features, which the verif engr. has thought of.

Code coverage needs not additional man effort.

Hi,

Is any tool available for "Functional Coverage" ?

Anand

All the HVL simulators have Functional Coverage tool with it.
You have to write coverage code and then switch ON the coverage during simulation.

And use a coverage viewing tool (again, the same EDA company will have it) to view the coverage.

For Cadence IES/IUS:

  1. For switching coverage ON:
    Use +nccovfile+dut_cov.txt while compiling.
    The content of dut_cov.txt is:
    select_coverage -all -module top…
    select_functional
    select_fsm
    During simulation use:
    -covoverwrite -covtest mycov.cov

  2. To view coverage:
    Do: iccr -keywords+detail iccr.cmd
    or: iccr -keywords+summary iccr.cmd
    or: iccr -keywords+dontmerge iccr.cmd
    The contents of iccr.cmd is:

load_test cov_work/design/* merge * -output ALL reset_coverage load_test cov_work/design/ALL report_detail -instance -betsafd -cgopt top... > detail.rpt load_test cov_work/design/* merge * -output ALL reset_coverage load_test cov_work/design/ALL report_summary -instance -cgopt top... > summary.rpt load_test cov_work/design/* report_summary -instance -cgopt top... > summary.rpt

Most of the commands are very self explanatory.
That’s why, I didn’t explain what each of them mean.

There is a coverage quick start guide included with IUS as well in order to get you started. Search for “icc quick start guide” in cdnshelp.

Hi all,

I have a doubt regarding Pipelined design covergroups and coverpoints.
Suppose there is a DUT with inputs a,b and output o where inputs are changing at every posedge of clock and output is
o(at clock cycle 3)= f(a(at clock cycle 1),b(at clock cycle 1)).

In this case ,how to assure that the output o at clock cycle 3 is covered with inputs a,b of clock cycle 1.

Thanks
Pradeep

You can modify your code and sample the cover point at the custom event or you can explicitly call the .sample method on the cover group when you want to cover it or interesting events.

covergroup @ (my_event)

always (@posdedge clk1 or clk2)
// trigger my_event

It it does not solve you purpose I guess you may need to write separate cover point for input and output and sample them at different clocks. Does it helps ?

All the HVL simulators have Functional Coverage tool with it.
You have to write coverage code and then switch ON the coverage during simulation.
And use a coverage viewing tool (again, the same EDA company will have it) to view the coverage.
For Cadence IES/IUS:

  1. For switching coverage ON:
    Use +nccovfile+dut_cov.txt while compiling.
    The content of dut_cov.txt is:
    select_coverage -all -module top…
    select_functional
    select_fsm
    During simulation use:
    -covoverwrite -covtest mycov.cov
  2. To view coverage:
    Do: iccr -keywords+detail iccr.cmd
    or: iccr -keywords+summary iccr.cmd
    or: iccr -keywords+dontmerge iccr.cmd
    The contents of iccr.cmd is:

    load_test cov_work/design/*
    merge * -output ALL
    reset_coverage
    load_test cov_work/design/ALL
    report_detail -instance -betsafd -cgopt top… > detail.rpt
load_test cov_work/design/* merge * -output ALL reset_coverage load_test cov_work/design/ALL report_summary -instance -cgopt top... > summary.rpt load_test cov_work/design/* report_summary -instance -cgopt top... > summary.rpt -------------------------------------------------- Most of the commands are very self explanatory. That's why, I didn't explain what each of them mean.

Is there any documentation about the commands which are related to ovm or like this switches
if it is there please tell me…