AXI3 bus protocol

I have two questions about AXI3.0 bus

  1. On what basis, address space is decided to 4KB ?
  2. AXI write has write strobe but why AXI read does not have read strobe?
    It will great if anyone can explain.


  1. By having limitation on max burst boundary, allow efficient system design by enabling the arbitration logic in the interconnect to give all masters a fair chance at burst boundaries. Otherwise a master doing large bursts for a long time could potentially clog the system performance.

  2. There is no meaning to have Strobe at read because read is always gives the data which is asked , Only writing has additional requirement if data should write fully or partially based on memory.

-Vinay Jain