Assertion using Generate Block

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In reply to sraja:

Hi sraja,

      Regarding Dave's example, it should work, you don't need two variables for iteration and shift.

With loop variable only you can achieve that.The only thing is that increment condition should has to be less than your 2**N where N=number of bit positions you want shift.

See here example :


module test2;

   bit [63:0] TX_DATA;
   
   task automatic display_tx(input int xyz);
      #(1 * xyz);
      $display("time=%0t ,The value=%0d",$time,xyz);
   endtask // display_tx
   
   generate  
      for(genvar TX_DATA=1; TX_DATA<17; TX_DATA<<=1) // or TX_DATA = TX_DATA<<1;
	begin 
	   initial
	     begin
		display_tx(TX_DATA);
	     end
	end
   endgenerate
   

   
endmodule // test2

And the simulation results :


VSIM 1> run -all
# time=1 ,The value=1
# time=2 ,The value=2
# time=4 ,The value=4
# time=8 ,The value=8
# time=16 ,The value=16

Regarding my example :

You need to declare TX_DATA as an array (please see my previous post) and i am not sure why you have omitted the for loop from generate block.

simulation output of my example :



VSIM 1> run -all
# the value=1
# the value=10
# the value=100

Please run it and see.