TLM ports in sequencer and driver

Dear Sir/Madam,

Can I use analysis port/export between sequencer and driver components?

Thanks and Regards,
Sudheer

The uvm_sequencer and uvm_driver already have a port used for passing transactions from the sequencer to the driver called ‘seq_item_export’. You should be using this port for all communications between the driver and sequencer since it is used for arbitration and other sequence control. Is there a reason why this won’t work for you?

In reply to cgales:

Hi Cgales,

Thanks for your response. Actually, seq_item_export is working fine for us. But we just want to know other way of tlm port connectivity.

Thanks,
Sudheer.

In reply to sudheer:

Can you add some additional information about what you are trying to accomplish then and why the seq_item_export doesn’t meet your needs?