Signed numbers for coveragebin

Coverage
,
1

6 BIT SIGNED NUMBER in which MSB is for sign , therefor its range is -31 to +31.
now for coverage , i do something like this , will this work:

coverpoint dut.signednumber[4:0] {
    bins signed_31N_28N = {[31:28]}iff(dut.signednumber[5] == 1)
   .......
   ......
   ......
   .....
   }

in the same way ill cover all other bins and (signed number[5] == 0) for +ve numbers.

is it proper way or
coverpoint dut.signednumber[5]; bin0 and bin1;
coverpoint dut.signednumber[4:0];binranges…

then cross both of the above…

which one is better or any other method??

2

In reply to unofficial_id:

How about forgetting SystemVerilog for a moment and explain what you are looking to cover. i.e. What values from signednumber do you need to see to achieve 100% coverage?

3

thx for ur reply,
I need to cover values from -31 to +31, I can group 4 numbers to form one bin, so how to do this in easiest way,

my personal thought wrt this is , giving bins specific names but the values covered is in the below form.

ex : signum[5:0]; //actual size
coverpoint signum[4:0]** {
bin 31N_27N = {[27:31]} iff (signum[5] == 1);
…
…
…
bin 31P_27P = {[27:31]}iff (signum[5] == 0);}

will this type of coding work and is there any other way of doing this much more efficiently??

4

I have sample code to get idea about signed number coverage.
Click here for example.