Coverage of all array elements simultaneously

Coverage
1

Hello,
I’m new to Verification and UVM.
I have an array “int[31:0] arr” when each element can take an integer between {0…10}.
i want to get 100% coverage when all elements united cover all the range .
for example i want to get 100% coverage from only one test that fulfills arr=[0,1,2,3,4,5,6,7,8,9,10,…]
and 100% coverage from 10 test that fulfils :
arr=[0,0,0,0,0,0,0,…]
arr=[1,1,1,1,1,1,1…]
arr=[2,2,2,2,2,2,2…]
.
.
.
.
.
arr=[10,10,10,10,10,10,10,…]

any help?
Thanks

2

In reply to TonyFrancis:
SystemVerilog covergroups cannot deal with arrays, so you’ll have to add some code around it

covergroup arrcg with sample(int element);
  coverpoint element {
    bins allsame = {0:10};
    bins series. = {-1}; // some value not in the range above
}
endgroup
arrcg cg = new();

function void my_sample
  for(int value=0;value<11;value++}
    if ( arr.and() with (item==value) )
      cg.sample(value);
  if (arr.and() with (item==item.index) )
      cg.sample(-1); // series
endfunction