John Stickley is a Verification Technologist at Siemens EDA Emulation Division. His research interests are in electronic design verification methodologies. His most recent work at Siemens EDA has been in the area of high-performance emulation based verification techniques in particular with using SystemVerilog OVM/UVM and SystemC TLM-2.0 based testbench modeling - particularly in conjunction with the use of virtual processor platforms. He has 30 years of experience in the EDA industry and holds a BSEE degree from Cornell University.