Dave Rich is member of the Flows and Methodology Product Engineering team for Siemens EDA. He is chartered with streamlining our testbench flows as they interact with a number of our products, especially around the Questa Simulation platform. Dave brings over three decades of design and verification experience to bear on developing advanced verification methodologies. He has been actively involved in the standardization of SystemVerilog, via Accellera and then the IEEE, where he has served as co- chair of the Technical Champions committee in the SystemVerilog IEEE 1800 Working Group. At Mentor Graphics, Dave was one of the original designers of the Advanced Verification Methodology (AVM), and later the Open Verification Methodology (OVM). Prior to that, Dave worked on early simulation and synthesis technologies at a variety of EDA companies.
