Dave Rich is a Senior Verification Consultant in Mentor’s Consulting Division where he brings over three decades of design and verification experience to bear on developing advanced verification methodologies, particularly using SystemVerilog , UVM, and educating users on how to adopt them. He has been actively involved in the standardization of SystemVerilog, starting with his days as a member of the Superlog language design team at Co-Design Automation through its standardization via Accellera and then the IEEE, where he has served as co- chair of the Technical Champions committee in the SystemVerilog IEEE 1800 Working Group. At Mentor Graphics, Dave was one of the original designers of the Advanced Verification Methodology (AVM), and later the Open Verification Methodology (OVM) which is now the foundation of the Universal Verification Methodology(UVM). He has published multiple articles and technical papers about SystemVerilog, verification methodologies, C-based integration with verification, other functional verification topics.