Dave Aerne is a Verification Technologist at Siemens EDA for the Design Verification Technology Division, focusing on Questa Verification IP. Prior to joining the EDA industry, he gained over 18 years of SoC Design and Verification experience in various roles at semiconductor companies and fabless startups. Dave received a BSCompE from the University of Illinois, Urbana-Champaign and a MSCompE from National Technological University in Fort Collins, Colorado. Dave is based in Portland, Oregon.