The SystemVerilog User Group website has closed, but that doesn't mean the SystemVerilog movement ends. SVUG has teamed up with the Verification Academy Forum to further serve the SystemVerilog community.
Be sure to check out the Verification Academy's Introduction to SystemVerilog Assertions session within the Assertion-Based Verification course and the new SystemVerilog OOP for UVM Verification course. The Academy has become a trusted source of training course material by leading subject matter experts and requires a corporate email account for access.
Thank you again for all of your participation and we hope to see you on the Forum in the Verification Academy.