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osting-regression-throughput-by-reusing-setup-phase-simulation/</loc><lastmod>2025-10-03</lastmod></url><url><loc>https://verificationacademy.com/topics/uvm-universal-verification-methodology/boosting-simulation-performance-of-uvm-registers-in-high-performance-systems/</loc><lastmod>2025-09-26</lastmod></url><url><loc>https://verificationacademy.com/topics/verification-ip/breaking-barriers-ethernet-1-6t-infiniband-ualink-and-uec-verification-for-next-gen-connectivity/</loc><lastmod>2025-09-07</lastmod></url><url><loc>https://verificationacademy.com/topics/questa-design-solutions/breaking-silos-creating-synergistic-flows-for-next-gen-verification/</loc><lastmod>2025-10-08</lastmod></url><url><loc>https://verificationacademy.com/topics/planning-measurement-and-analysis/breaking-the-bottleneck-overcoming-the-verification-productivity-gap/</loc><lastmod>2025-11-11</lastmod></url><url><loc>https://verificationacademy.com/topics/formal-verification/breaking-the-formal-verification-bottleneck-faster-comprehensive-testing-for-parameterized-modules/</loc><lastmod>2025-09-07</lastmod></url><url><loc>https://verificationacademy.com/topics/formal-verification/breaking-the-risc-v-processor-customization-barrier-with-formal-verification/</loc><lastmod>2026-01-29</lastmod></url><url><loc>https://verificationacademy.com/topics/fpga-verification/breaking-the-speed-limits-on-soc-verification-with-questa/</loc><lastmod>2025-12-22</lastmod></url><url><loc>https://verificationacademy.com/author/brian-craw/</loc><lastmod>2025-08-06</lastmod></url><url><loc>https://verificationacademy.com/author/brian-mathewson/</loc><lastmod>2025-08-06</lastmod></url><url><loc>https://verificationacademy.com/verification-horizons/july-2020-volume-16-issue-2/bridging-the-portability-gap-for-uvm-spi-vip-core-reuse-from-ip-to-sub-system-and-soc/</loc><lastmod>2025-08-06</lastmod></url><url><loc>https://verificationacademy.com/verification-horizons/july-2022-volume-18-issue-2/bringing-5g-nr-radio-frame-generation-and-analysis-to-the-veloce-x-step-product-family/</loc><lastmod>2025-08-06</lastmod></url><url><loc>https://verificationacademy.com/topics/functional-safety/aerospace-and-defense-verification-tech-day/bringing-model-based-systems-engineering-to-ic-and-fpga-design/</loc><lastmod>2025-09-07</lastmod></url><url><loc>https://verificationacademy.com/topics/verification-management/bringing-regression-systems-into-the-21st-century/</loc><lastmod>2025-10-09</lastmod></url><url><loc>https://verificationacademy.com/topics/low-power/bringing-reset-and-power-domains-together-confronting-upf-instrumentation-issues/</loc><lastmod>2025-10-15</lastmod></url><url><loc>https://verificationacademy.com/verification-horizons/february-2013-volume-9-issue-1/bringing-verification-and-validation-under-one-umbrella/</loc><lastmod>2025-08-06</lastmod></url><url><loc>https://verificationacademy.com/author/bryan-ramirez/</loc><lastmod>2026-03-02</lastmod></url><url><loc>https://verificationacademy.com/verification-horizons/november-2018-volume-14-issue-3/building-a-better-virtual-sequence-with-portable-stimulus/</loc><lastmod>2025-10-14</lastmod></url><url><loc>https://verificationacademy.com/cookbook/uvm-universal-verification-methodology/built-in-debug/</loc><lastmod>2025-08-06</lastmod></url><url><loc>https://verificationacademy.com/topics/uvm-universal-verification-methodology/functional-verification-of-digital-logic/data-types-and-procedural-statements/built-in-unpacked-arrays/</loc><lastmod>2026-02-02</lastmod></url><url><loc>https://verificationacademy.com/cookbook/uvm-universal-verification-methodology/built-in-register-sequences/</loc><lastmod>2025-08-06</lastmod></url><url><loc>https://verificationacademy.com/cookbook/coverage/bus-protocol-coverage/</loc><lastmod>2025-08-06</lastmod></url><url><loc>https://verificationacademy.com/author/buu-huynh/</loc><lastmod>2025-10-07</lastmod></url><url><loc>https://verificationacademy.com/author/byron-brinson/</loc><lastmod>2025-08-06</lastmod></url><url><loc>https://verificationacademy.com/cookbook/uvm-universal-verification-methodology/c-based-stimulus/</loc><lastmod>2025-08-06</lastmod></url><url><loc>https://verificationacademy.com/topics/uvm-universal-verification-methodology/c-based-stimulus-for-uvm/</loc><lastmod>2026-03-02</lastmod></url><url><loc>https://verificationacademy.com/topics/clock-domain-crossing/cdc-philosophy-the-existential-questions-of-constraints-waivers-and-truth/</loc><lastmod>2025-10-07</lastmod></url><url><loc>https://verificationacademy.com/topics/clock-domain-crossing/cdc-verification/</loc><lastmod>2025-08-06</lastmod></url><url><loc>https://verificationacademy.com/topics/clock-domain-crossing/cdc-verification-beyond-structural-analysis/</loc><lastmod>2025-10-17</lastmod></url><url><loc>https://verificationacademy.com/topics/questa-design-solutions/cdc-and-rdc-assist_applying-machine-learning-to-accelerate-cdc-analysis/</loc><lastmod>2025-10-07</lastmod></url><url><loc>https://verification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ademy.com/verification-horizons/june-2018-volume-14-issue-2/three-main-components-to-look-for-in-your-emulation-platform/</loc><lastmod>2025-08-06</lastmod></url><url><loc>https://verificationacademy.com/verification-horizons/october-2012-volume-8-issue-3/three-steps-unified-soc-design-and-verification/</loc><lastmod>2025-08-12</lastmod></url><url><loc>https://verificationacademy.com/topics/uvm-universal-verification-methodology/functional-verification-of-digital-logic/execution-semantics-and-synchronization/timing-and-execution-semantics/</loc><lastmod>2026-02-03</lastmod></url><url><loc>https://verificationacademy.com/author/tom-fitzpatrick/</loc><lastmod>2025-08-28</lastmod></url><url><loc>https://verificationacademy.com/author/tom-kiley/</loc><lastmod>2025-08-06</lastmod></url><url><loc>https://verificationacademy.com/author/tomasz-piekarz/</loc><lastmod>2025-08-06</lastmod></url><url><loc>https://verificationacademy.com/verification-horizons/march-2024-volume-20-issue-1/tool-assisted-debug-in-visualizer/</loc><lastmod>2025-08-06</lastmod></url><url><loc>https://verificationacademy.com/verification-horizons/february-2013-volume-9-issue-1/top-five-reasons-why-every-dv-engineer-will-love-the-latest-systemverilog-2012-features/</loc><lastmod>2025-08-06</lastmod></url><url><loc>https://verificationacademy.com/verification-horizons/march-2016-volume-12-issue-1/total-recall-what-to-look-for-in-a-memory-model-library/</loc><lastmod>2025-08-06</lastmod></url><url><loc>https://verificationacademy.com/topics/functional-safety/traceability-for-automotive-standards-compliance/</loc><lastmod>2025-10-17</lastmod></url><url><loc>https://verificationacademy.com/topics/verification-ip/traffic-profiling-and-performance-instrumentation-for-on-chip-interconnects/</loc><lastmod>2025-09-26</lastmod></url><url><loc>https://verificationacademy.com/topics/uvm-universal-verification-methodology/introduction-to-the-uvm/transaction-level-testing/</loc><lastmod>2025-09-07</lastmod></url><url><loc>https://verificationacademy.com/cookbook/uvm-universal-verification-methodology/transaction-methods/</loc><lastmod>2025-11-13</lastmod></url><url><loc>https://verificationacademy.com/topics/debug/visualizer-debug-environment-advanced-debug-techniques/transaction-recording-and-debug-with-questa-and-visualizer/</loc><lastmod>2026-02-12</lastmod></url><url><loc>https://verificationacademy.com/topics/uvm-universal-verification-methodology/transaction-recording-anywhere-anytime/</loc><lastmod>2025-09-26</lastmod></url><url><loc>https://verificationacademy.com/topics/uvm-universal-verification-methodology/uvmc/transaction-level-friending-an-open-source-standards-based-library-for-connecting-tlm-models-in-systemc-and-systemverilog/</loc><lastmod>2025-09-29</lastmod></url><url><loc>https://verificationacademy.com/topics/fpga-verification/evolving-fpga-verification-capabilitiess/transactions/</loc><lastmod>2025-09-07</lastmod></url><url><loc>https://verificationacademy.com/topics/verification-management/transforming-verification-and-verification-management/</loc><lastmod>2026-03-02</lastmod></url><url><loc>https://verificationacademy.com/topics/verification-ip/trends-and-requirements-in-high-speed-interface-verification/</loc><lastmod>2025-09-07</lastmod></url><url><loc>https://verificationacademy.com/topics/planning-measurement-and-analysis/trends-in-functional-verification/</loc><lastmod>2025-10-10</lastmod></url><url><loc>https://verificationacademy.com/topics/functional-safety/aerospace-and-defense-verification-tech-day/trust-but-verify-your-ip-with-solido-crosscheck/</loc><lastmod>2025-09-07</lastmod></url><url><loc>https://verificationacademy.com/topics/planning-measurement-and-analysis/turning-vision-into-reality-how-questa-one-fulfills-the-promise-of-smart-verification/</loc><lastmod>2025-11-10</lastmod></url><url><loc>https://verificationacademy.com/author/tzi-yang-shao/</loc><lastmod>2025-08-06</lastmod></url><url><loc>https://verificationacademy.com/cookbook/coverage/uart-example-covergroups/</loc><lastmod>2025-08-06</lastmod></url><url><loc>https://verificationacademy.com/cookbook/coverage/uart-example-test-plan/</loc><lastmod>2026-01-21</lastmod></url><url><loc>https://verificationacademy.com/resources/technical-papers/ucis-applications-improving-verification-productivity-simulation-throughput-and-coverage-closure-process/</loc><lastmod>2023-08-18</lastmod></url><url><loc>https://verificationacademy.com/topics/low-power/power-aware-verification/upf-2-0-enhancements/</loc><lastmod>2025-09-07</lastmod></url><url><loc>https://verificationacademy.com/topics/low-power/upf-information-model-the-future-of-low-power-verification-today/</loc><lastmod>2025-11-21</lastmod></url><url><loc>https://verificationacademy.com/topics/verification-ip/usb3-1-verification-challenges/</loc><lastmod>2025-09-07</lastmod></url><url><loc>https://verificationacademy.com/verification-horizons/november-2016-volume-12-issue-3/usb-type-c-verification-challenges-and-s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