So you’ve defined your coverage model, written your verification plan, and run verification – but you aren’t achieving full coverage. Now what? You need to analyze the results to understand where the coverage holes are, and for each one, why it is there. A coverage hole may indicate that the design is incomplete or incorrect. Or it may mean that the test environment is insufficient. Or it may simply mean that some IP block functionality is not used in this context. And there may be holes in your coverage model and verification plan that you cannot even see, because you failed to consider something. This session will review the analysis of coverage results to identify and respond to coverage holes appropriately. Along the way we’ll show how static analysis tools such as Questa CDC and Questa Formal can be used to help identify and address coverage holes.
