Directing a team of engineering staff to design, verify and deliver a product as complex as today's System-on-Chip (SoC) devices is a risky business. That risk comes sharply into focus as the verification activity comes to a close and the investment in silicon production is finally initiated. There are many things we can do to mitigate that risk, but until some future date where we replace our human designers (or their designs), with a collection of nanobots, we have to make the most out of our human limitations of focus, motivation, innovation, objectivity and accuracy. Some of those limitations even apply to verification professionals!
We postulate that data is the key to success and provide concrete examples that illustrate the value of data. Collection, analysis and visualization of design and verification data is what we do, in our daily design/verification workflows, helped along by our favorite D/V methodologies and EDA tools. This author has observed that successful teams get more out of the data they capture and how they use it, and avoid being overwhelmed by too much of the wrong data or the wrong kinds of processing. Recognizing that value, and amplifying it, is the next step to process maturity.
This is not just another paper listing useful metrics from the 1990s – instead we describe the challenge of maximizing utilization of the best design/verification tool we possess - our engineering brains. Their performance is limited by the rate we feed them with meaningful data - data at the right level of detail or abstraction to solve the problem at hand, and ideally data which is presented in a fluid, visual form to make the most of our parallel processing superpowers.
We explore data visualization techniques which are becoming standard practice in other industries and which can be leveraged in ours. We must pay heed to the challenges of managing 'Big Data' in our domain, so that it works for us rather than overwhelming us.
Practical examples are described of both low-level and top-down visualizations representing situations that occur during a typical SoC design/verification flow, such as debug situations, or the need to view a complex design in a particular abstraction or aspect. Real examples are illustrated using the increasingly popular D3.js graphics library, providing rich visualization of Big Data.
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