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    The Verification Academy offers users multiple entry points to find the information they need. One of these entry points is through Topic collections. These topics are industry standards that all design and verification engineers should recognize. While we continue to add new topics, users are encourage to further refine collection information to meet their specific interests.
    • Languages & Standards

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  • All Courses
    The Verification Academy is organized into a collection of free online courses, focusing on various key aspects of advanced functional verification. Each course consists of multiple sessions—allowing the participant to pick and choose specific topics of interest, as well as revisit any specific topics for future reference. After completing a specific course, the participant should be armed with enough knowledge to then understand the necessary steps required for maturing their own organization’s skills and infrastructure on the specific topic of interest. The Verification Academy will provide you with a unique opportunity to develop an understanding of how to mature your organization’s processes so that you can then reap the benefits that advanced functional verification offers.
    • Universal Verification Methodology (UVM)

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      • UVMF - One Bite at a Time
    • Featured Courses

      • Introduction to ISO 26262
      • Introduction to DO-254
      • Clock-Domain Crossing Verification
      • Portable Stimulus Basics
      • Power Aware CDC Verification
      • Power Aware Verification
      • SystemVerilog OOP for UVM Verification
    • Additional Courses

      • Assertion-Based Verification
      • An Introduction to Unit Testing with SVUnit
      • Evolving FPGA Verification Capabilities
      • Metrics in SoC Verification
      • SystemVerilog Testbench Acceleration
      • Testbench Co-Emulation: SystemC & TLM-2.0
      • Verification Planning and Management
      • VHDL-2008 Why It Matters
    • Formal-Based Techniques

      • Formal Assertion-Based Verification
      • Formal-Based Technology: Automatic Formal Solutions
      • Formal Coverage
      • Getting Started with Formal-Based Technology
      • Handling Inconclusive Assertions in Formal Verification
      • Sequential Logic Equivalence Checking
    • Analog/Mixed Signal

      • AMS Design Configuration Schemes
      • Improve AMS Verification Performance
      • Improve AMS Verification Quality
  • All Forum Topics
    The Verification Community is eager to answer your UVM, SystemVerilog and Coverage related questions. We encourage you to take an active role in the Forums by answering and commenting to any questions that you are able to.
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  • Patterns Library
    The Verification Academy Patterns Library contains a collection of solutions to many of today's verification problems. The patterns contained in the library span across the entire domain of verification (i.e., from specification to methodology to implementation—and across multiple verification engines such as formal, simulation, and emulation).
    • Implementation Patterns

      • Environment Patterns
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    • Specification Patterns

      • Occurrence Property Patterns
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    • Pattern Resources

      • Start Here - Patterns Library Overview
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  • All Cookbooks
    Find all the methodology you need in this comprehensive and vast collection. The UVM and Coverage Cookbooks contain dozens of informative, executable articles covering all aspects of UVM and Coverage.
    • UVM Cookbook

      • UVM Basics
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    • Coding Guidelines & Deployment

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    • Coverage Cookbook

      • Introduction
      • What is Coverage?
      • Kinds of Coverage
      • Specification to Testplan
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      • Bus Protocol Coverage
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      • Requirements Writing Guidelines
      • Coverage Cookbook
  • All Events
    No one argues that the challenges of verification are growing exponentially. What is needed to meet these challenges are tools, methodologies and processes that can help you transform your verification environment. These recorded seminars from Verification Academy trainers and users provide examples for adoption of new technologies and how to evolve your verification process.
    • Upcoming & Featured Events

      • U2U MARLUG - January 26th
      • Creating an Optimal Safety Architecture  - February 9th
      • The ABC of Formal Verification - February 11th
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  • About Verification Academy
    The Verification Academy will provide you with a unique opportunity to develop an understanding of how to mature your organization's processes so that you can then reap the benefits that advanced functional verification offers.
    • Blog & News

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    • Verification Horizons Publication

      • Verification Horizons - November 2020
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  • Home /
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  • Design & Verification in the SoC Era

Design & Verification in the SoC Era

The challenges of verification continue growing exponentially. Through advances in technology and methodology, verification productivity has improved dramatically over the past decade. Yet, the continuing growth in the size of verification teams and the amount of project time dedicated to verification indicate the need for greater advances in productivity.

As we enter the era of SoCs, verification complexity will be driven by increased design complexity of multiple cores running many applications to deliver on-demand content in consumer devices such as tablets and smartphones.

It is clear that verification must be transformed in order to deliver the productivity that will enable the next generation of multi-core SoC consumer electronics. Innovative technologies that deliver 10-100x advances in verification are required. As the impact of software in electronic systems grows, verification solutions must expand to enable co-verification with advanced verification technology. Comprehensive solutions and methodology will integrate these innovative tools and enable real-time progress tracking, trend analysis and increased automation and efficiency of the verification process.


Harry Foster
Mark Olen
Erich Marschner
Thom Ellis
Formal-Based Techniques Planning, Measurement and Analysis Simulation-Based Techniques
Walk

Sessions

Trends, Predictions and Forecasts

Trends, Predictions and Forecasts Session | Harry Foster - Subject Matter Expert | Design & Verification in the SoC Era Seminar

What defines the requirements for the SoC era? What is the future of design and verification for SoCs?

Accelerating Time to Coverage Closure

Accelerating Time to Coverage Closure Session | Subject Matter Expert - Mark Olen | Design & Verification in the SoC Era Seminar

This session shows a new breakthrough that can help you realize an order of magnitude gain in verification productivity.

Understanding Coverage Holes

Understanding Coverage Holes Session | Subject Matter Expert - Erich Marshner | Design & Verification in the SoC Era Seminar

This session will review the analysis of coverage results to identify and respond to coverage holes appropriately.

Accelerating Coverage Closure with a Plan

Accelerating Coverage Closure with a Plan Session | Subject Matter Expert - Thom Ellis | Design & Verification in the SoC Era Seminar

This session will show how to apply Verification Planning techniques in process, tools and data management.

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