Posted by ben@SystemVerilog.us on Jun 5, 2023
In reply to new_to_uvm: Try something like the following: Keep in mind that task t_aabb() is forked at every @(posedge aa), thus, the 2n posedge of aa will triggered it again. with a guard for a single trigger of the task https://www.edaplayground.com/x/H ...
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