WILSONVILLE, Ore., Nov. 19, 2013—Mentor Graphics Corp. (NASDAQ: MENT), today announced that Digital Media Professionals (DMP) has qualified the Questa® functional verification platform for use on its advanced graphics IP that implements DMP's advanced algorithms. DMP also uses the Questa functional verification platform on its portfolio of 3D and 2D graphics system-on-chip (SoC) solutions to meet the diverse needs of customers such as performance, function, gate size and cost.
DMP is recognized as the leading IP supplier in the embedded graphics device market with its high performance algorithm to bring stunning results for both 2D vector and 3D graphics. The company’s solutions are widely adopted in mobile, home, amusement, car and many more electronic product application areas.
The Questa functional verification platform was chosen because it provides a full complement of verification capabilities, from planning to testbench implementation and results analysis, all tuned to extract the most value and efficiency from the Universal Verification Methodology (UVM), the industry standard functional verification methodology, which DMP uses for its verification infrastructure.
An example of this tuning is DMP’s use of the Questa platform in a specification-driven flow to create correct-by-construction register models automatically for their verification environment. The UVM register package was created to support verification of complex IP and SoCs, which employ large numbers of registers, but modeling the registers for verification by hand is a labor-intensive and error-prone process. Using the Questa platform, DMP engineers can simply import register definitions from a spreadsheet or other specification and instantly create their register verification models, as well as automated tests for the entire register set.
“Customers using our graphics IP are facing intense competition in the market, and are often forced to change the product specification at late stages of the product development cycle,” said Eisaku Ohbuchi, director, Core Technology Development, Digital Media Professionals Inc. “By using the Questa register assistant features, we find that our engineers keep up with customers' demand for specification changes in a very flexible manner while maintaining a sharp focus on all the other aspects of verification.”
“The qualification of the Questa functional verification platform for DMP's graphics IP will provide significant value to the many silicon suppliers who are our mutual customers,” said John Lenyo, vice president and general manager, Design Verification Technology (DVT) Division, Mentor Graphics. “Mentor’s functional verification team pioneered much of the work that now defines the UVM, and we continue to invest heavily in tool development and infrastructure to make our users more productive. From advanced debug and visualization of UVM testbenches, to unique stimulus and coverage tools that plug into UVM environments, we are committed to provide our customers with the best platform for functional verification.”