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    The Verification Academy offers users multiple entry points to find the information they need. One of these entry points is through Topic collections. These topics are industry standards that all design and verification engineers should recognize. While we continue to add new topics, users are encourage to further refine collection information to meet their specific interests.
    • Languages & Standards

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  • All Courses
    The Verification Academy is organized into a collection of free online courses, focusing on various key aspects of advanced functional verification. Each course consists of multiple sessions—allowing the participant to pick and choose specific topics of interest, as well as revisit any specific topics for future reference. After completing a specific course, the participant should be armed with enough knowledge to then understand the necessary steps required for maturing their own organization’s skills and infrastructure on the specific topic of interest. The Verification Academy will provide you with a unique opportunity to develop an understanding of how to mature your organization’s processes so that you can then reap the benefits that advanced functional verification offers.
    • Universal Verification Methodology (UVM)

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      • UVMF - One Bite at a Time
    • Featured Courses

      • Introduction to ISO 26262
      • Introduction to DO-254
      • Clock-Domain Crossing Verification
      • Portable Stimulus Basics
      • Power Aware CDC Verification
      • Power Aware Verification
      • SystemVerilog OOP for UVM Verification
    • Additional Courses

      • Assertion-Based Verification
      • An Introduction to Unit Testing with SVUnit
      • Evolving FPGA Verification Capabilities
      • Metrics in SoC Verification
      • SystemVerilog Testbench Acceleration
      • Testbench Co-Emulation: SystemC & TLM-2.0
      • Verification Planning and Management
      • VHDL-2008 Why It Matters
    • Formal-Based Techniques

      • Formal Assertion-Based Verification
      • Formal-Based Technology: Automatic Formal Solutions
      • Formal Coverage
      • Getting Started with Formal-Based Technology
      • Handling Inconclusive Assertions in Formal Verification
      • Sequential Logic Equivalence Checking
    • Analog/Mixed Signal

      • AMS Design Configuration Schemes
      • Improve AMS Verification Performance
      • Improve AMS Verification Quality
  • All Forum Topics
    The Verification Community is eager to answer your UVM, SystemVerilog and Coverage related questions. We encourage you to take an active role in the Forums by answering and commenting to any questions that you are able to.
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  • Patterns Library
    The Verification Academy Patterns Library contains a collection of solutions to many of today's verification problems. The patterns contained in the library span across the entire domain of verification (i.e., from specification to methodology to implementation—and across multiple verification engines such as formal, simulation, and emulation).
    • Implementation Patterns

      • Environment Patterns
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      • Occurrence Property Patterns
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    • Pattern Resources

      • Start Here - Patterns Library Overview
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  • All Cookbooks
    Find all the methodology you need in this comprehensive and vast collection. The UVM and Coverage Cookbooks contain dozens of informative, executable articles covering all aspects of UVM and Coverage.
    • UVM Cookbook

      • UVM Basics
      • Testbench Architecture
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      • Register Abstraction Layer
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      • UVM Connect - SV-SystemC interoperability
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    • Coding Guidelines & Deployment

      • Code Examples
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    • Coverage Cookbook

      • Introduction
      • What is Coverage?
      • Kinds of Coverage
      • Specification to Testplan
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      • Bus Protocol Coverage
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      • Coverage Cookbook
  • All Events
    No one argues that the challenges of verification are growing exponentially. What is needed to meet these challenges are tools, methodologies and processes that can help you transform your verification environment. These recorded seminars from Verification Academy trainers and users provide examples for adoption of new technologies and how to evolve your verification process.
    • Upcoming & Featured Events

      • Low Power Verification - 4/29
      • Fault Campaign for Mixed-Signal - 5/4
      • User2User - 5/26
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      • CDC+RDC Analysis
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  • About Verification Academy
    The Verification Academy will provide you with a unique opportunity to develop an understanding of how to mature your organization's processes so that you can then reap the benefits that advanced functional verification offers.
    • Blog & News

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      • Verification Horizons - March 2021
      • Verification Horizons - November 2020
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  • Verification Horizons
  • Mentor Graphics Accelerates SoC and Embedded System Delivery with a Native Embedded Software Environment for Pre- and Post-Silicon Development, Embedding QEMU, SystemC and Emulation

Mentor Graphics Accelerates SoC and Embedded System Delivery with a Native Embedded Software Environment for Pre- and Post-Silicon Development, Embedding QEMU, SystemC and Emulation

WILSONVILLE, Ore., April 22, 2013 - Mentor Graphics Corporation (NASDAQ: MENT) today announced release of the Mentor® Embedded Sourcery™ CodeBench Virtual Edition product, a native software environment for developing embedded systems pre- and post-silicon. Now, ever-expanding teams of software developers can remain in their core development environment and develop, debug, and optimize their complete software stack on virtual prototypes and emulation platforms, before and after first silicon.

“Software development and hardware development are deeply intertwined, yet intensely unique disciplines. Asking a software designer to use a hardware design tool is like asking a plumber to install your sink with an electrician’s wire cutters,” said Glenn Perry, general manager of Mentor Graphics Embedded Software Division. “It’s critical to respect the uniqueness of each discipline and we believe our Sourcery CodeBench Virtual Edition delivers a true native software environment that deeply leverages our hardware design tool technology.”

The Sourcery CodeBench technology is the leading development toolchain and integrated development environment (IDE) for embedded Linux development, which is now the de facto standard reference operating system (OS) on all SoCs. The Sourcery CodeBench Virtual Edition product embeds the most advanced pre-silicon technology available from the hardware design tool flow, deeply into the native software environment. This yields a significant time-to-market advantage for software development teams by eliminating the valuable time and effort spent learning unfamiliar traditional hardware design tools. The Sourcery CodeBench Virtual Edition tool goes beyond enabling software development ahead of silicon to offer unprecedented visibility into hardware/software interactions, otherwise unavailable through the limited debug interfaces in actual hardware.

True Native Software Environment – The Key Differentiation

Mentor’s 15-year investment in embedded software has yielded findings concurring that most software developers will not adopt hardware design tools even if they have been enhanced and/or interfaced to software tools. After acquiring CodeSourcery in 2010, Mentor Graphics modified the leading embedded development environment by embedding hardware design intelligence directly into the native environment. Conversely, the traditional EDA industry approach has seen limited success by attempting to modify hardware tools for use by software developers.

IP and SoC suppliers can speed time-to-market for their downstream customers by providing embedded software development capability, including software development kits (SDKs), before silicon. The same native software development environment can then be used downstream in the design flow alongside virtual platform representations provided by systems companies and OEMs to design and develop embedded systems ahead of silicon availability. Embedded developers can simply transition to actual hardware with the same Sourcery CodeBench native development environment.

Early Software Integration is Critical

By bringing software integration into the early pre-silicon phases, the Sourcery CodeBench Virtual Edition speeds product delivery and improves hardware and system quality. This helps ensure hardware is tuned and optimized to the end-application, and that the software is ported and integrated efficiently. Such deep visibility enables post-silicon bug tracking that is impossible to identify with physical boards. Relevant capabilities of this edition include:

  • Non-intrusive visibility and tracing for memory-mapped registers and deep hardware states, including CPU internals, memories, cache and fetch sequences
  • Tightly controlled system execution, such as stopping all system clocks instantly, and cross debugging hardware and software execution
  • Trace and debug of complex hardware/software interactions deterministically with the ability to set breakpoints on any software or hardware object
  • Simulation APIs with semi-hosting and direct access to the target file system for host-target file transfers
  • API and backdoor access for testability and non-intrusive software code injection

Sourcery CodeBench and Sourcery Analyzer for Fast System Analysis

The Sourcery CodeBench Virtual Edition environment includes the Sourcery Analyzer tool to quickly visualize and analyze system data. This product provides application and kernel level insight and supports a broad array of time-stamped data formats such as the Linux Trace Toolkit (LTTng). By visually showing how processor cores and system resources are being used, it enables embedded developers to quickly identify bottlenecks in order to debug or decode these problems. By applying trace points anywhere in the application, developers can visually identify the critical section of software code impacting system performance.

The Sourcery CodeBench Virtual Edition product is integrated with the Mentor Graphics® Vista™ platform for early abstract functional models of the hardware even before the hardware design is implemented in register transfer level (RTL). The Vista platform supports industry standard SystemC/TLM 2.0 virtual prototypes and QEMU machine emulators.

The new Mentor Embedded Sourcery CodeBench Virtual Edition is available now for evaluation. Contact your local Mentor Graphics representative or call 800-547-3000. For information on this product and to register for a webinar to learn more visit : http://www.mentor.com/embedded-software/sourcery-tools/sourcery-codebench/virtual-edition

About Mentor Embedded

The Mentor Graphics® Embedded Software Division enables embedded development for a variety of applications including automotive, industrial, smart energy, medical devices, and consumer electronics. Embedded developers can create systems with the latest processors and micro-controllers with commercially supported and customizable Linux®-based solutions including the industry -leading Sourcery™ CodeBench and Mentor Embedded Linux products. For real-time control systems, developers can take advantage of the small-foot-print and low-power-capable Nucleus® RTOS. For more information, visit www.mentor.com/embedded.

(Mentor Graphics and Mentor are registered trademarks and Sourcery and Vista are trademarks of Mentor Graphics Corporation. All other company or product names are the registered trademarks or trademarks of their respective owner.)

The registered trademark Linux® is used pursuant to a sublicense from LMI, the exclusive licensee of Linus Torvalds, owner of the mark on a world-wide basis.

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