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    The Verification Academy offers users multiple entry points to find the information they need. One of these entry points is through Topic collections. These topics are industry standards that all design and verification engineers should recognize. While we continue to add new topics, users are encourage to further refine collection information to meet their specific interests.
    • Languages & Standards

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  • All Courses
    The Verification Academy is organized into a collection of free online courses, focusing on various key aspects of advanced functional verification. Each course consists of multiple sessions—allowing the participant to pick and choose specific topics of interest, as well as revisit any specific topics for future reference. After completing a specific course, the participant should be armed with enough knowledge to then understand the necessary steps required for maturing their own organization’s skills and infrastructure on the specific topic of interest. The Verification Academy will provide you with a unique opportunity to develop an understanding of how to mature your organization’s processes so that you can then reap the benefits that advanced functional verification offers.
    • Universal Verification Methodology (UVM)

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      • UVMF - One Bite at a Time
    • Featured Courses

      • Introduction to ISO 26262
      • Introduction to DO-254
      • Clock-Domain Crossing Verification
      • Portable Stimulus Basics
      • Power Aware CDC Verification
      • Power Aware Verification
      • SystemVerilog OOP for UVM Verification
    • Additional Courses

      • Assertion-Based Verification
      • An Introduction to Unit Testing with SVUnit
      • Evolving FPGA Verification Capabilities
      • Metrics in SoC Verification
      • SystemVerilog Testbench Acceleration
      • Testbench Co-Emulation: SystemC & TLM-2.0
      • Verification Planning and Management
      • VHDL-2008 Why It Matters
    • Formal-Based Techniques

      • Formal Assertion-Based Verification
      • Formal-Based Technology: Automatic Formal Solutions
      • Formal Coverage
      • Getting Started with Formal-Based Technology
      • Handling Inconclusive Assertions in Formal Verification
      • Sequential Logic Equivalence Checking
    • Analog/Mixed Signal

      • AMS Design Configuration Schemes
      • Improve AMS Verification Performance
      • Improve AMS Verification Quality
  • All Forum Topics
    The Verification Community is eager to answer your UVM, SystemVerilog and Coverage related questions. We encourage you to take an active role in the Forums by answering and commenting to any questions that you are able to.
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  • Patterns Library
    The Verification Academy Patterns Library contains a collection of solutions to many of today's verification problems. The patterns contained in the library span across the entire domain of verification (i.e., from specification to methodology to implementation—and across multiple verification engines such as formal, simulation, and emulation).
    • Implementation Patterns

      • Environment Patterns
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      • Occurrence Property Patterns
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    • Pattern Resources

      • Start Here - Patterns Library Overview
      • Whitepaper - Taking Reuse to the Next Level
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  • All Cookbooks
    Find all the methodology you need in this comprehensive and vast collection. The UVM and Coverage Cookbooks contain dozens of informative, executable articles covering all aspects of UVM and Coverage.
    • UVM Cookbook

      • UVM Basics
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      • Register Abstraction Layer
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      • UVM Connect - SV-SystemC interoperability
      • UVM Versions and Compatibility
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    • Coding Guidelines & Deployment

      • Code Examples
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    • Coverage Cookbook

      • Introduction
      • What is Coverage?
      • Kinds of Coverage
      • Specification to Testplan
      • Testplan to Functional Coverage
      • Bus Protocol Coverage
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      • Requirements Writing Guidelines
      • Coverage Cookbook
  • All Events
    No one argues that the challenges of verification are growing exponentially. What is needed to meet these challenges are tools, methodologies and processes that can help you transform your verification environment. These recorded seminars from Verification Academy trainers and users provide examples for adoption of new technologies and how to evolve your verification process.
    • Upcoming & Featured Events

      • Low Power Verification - 4/29
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  • About Verification Academy
    The Verification Academy will provide you with a unique opportunity to develop an understanding of how to mature your organization's processes so that you can then reap the benefits that advanced functional verification offers.
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  • Mentor Adds Veloce Strato Emulation Platform Software to Mentor Safe ISO 26262 Qualification Program

Mentor Adds Veloce Strato Emulation Platform Software to Mentor Safe ISO 26262 Qualification Program

Mentor, a Siemens business, announces that independent compliance firm SGS-TÜV Saar has certified the ISO 26262 compliance of tool qualification reports for key software elements of its groundbreaking new Veloce® Strato™ emulation platform. The certification extends Mentor’s leadership in functional safety assurance and hardware emulation technology, while helping chip designers meet and exceed the increasingly stringent safety and quality requirements of the global automotive industry.

Representing Mentor’s twenty-second ISO 26262 product qualification, these newest additions to the Mentor Safe program underscore the company’s commitment to securing the functional safety qualification of critical documentation for all signature members of its industry-leading electronic hardware and software design solutions portfolio.

“As demand for automated driving and sophisticated ADAS systems continues to transform the global automotive industry, the world’s leading carmakers and their suppliers increasingly require pre-qualified design automation technologies and documentation to speed time-to-market and ensure optimal cost efficiency,” said Eric Selosse, vice president and general manager of the Mentor Emulation Division. “With the Mentor Safe ISO 26262 qualification program, Mentor is answering the call by delivering platforms and solutions that help streamline and simplify the development, design and creation of automotive-grade ICs.”

Mentor’s Software Tool Qualification Reports provide documentation including assumed use cases and evidence that a software tool is suitable to be used for any tool confidence level (TCL) activity or task required by ISO 26262. SGS-TÜV Saar has certified the ISO 26262 compliance of these reports for the following software elements of the new Veloce Strato emulation platform:

  • The Veloce Strato OS, which enables high quality verification of system-level, RTL and GL hardware descriptions using a wide range of advanced technologies and methodologies. It allows users to manage the entire verification process, measure progress metrics, and use advanced stimuli to attain coverage targets quickly. Veloce Strato OS allows users to compile and simulate synthesizable hardware models written in VHDL, Verilog and SV, as well as comprehensive non-synthesizable testbench environment models written in VHDL, Verilog, SV, C, C++, and SystemC.
  • The Veloce Fault App, which allows users to inject faults into a design to mimic random environmental events that can occur and cause faulty operation of the circuit. The application allows customers to test and assess their design’s vulnerability to safety system failure and protect it before issues arise.
  • The Veloce Coverage App, which lets emulation users employ assertion coverage, functional coverage and code coverage capabilities to collect statistics during an emulation run.
  • The Veloce DFT App, which accelerates design-for-test verification for complete validation of test vectors and DFT logic prior to tape-out, boosting confidence, reducing risk, and speeding chip bring-up.

About Mentor’s Veloce Strato Emulation Platform
The Veloce Strato platform is Mentor’s third generation data-center friendly emulation platform, and the only emulation platform on the market with full scalability across both software and hardware. Underscoring Mentor’s commitment to pioneer all facets of hardware emulation, Veloce Strato features the largest portfolio of use models (applications), highest total throughput, and fastest co-model bandwidth and time-to-visibility, plus a roadmap to scale total effective platform capacity up to 15BG.

About Mentor Automotive and the Mentor Safe Program
Mentor is a long-established automotive systems supplier, engaged with nearly every leading OEM and Tier 1 supplier, and providing design tools and embedded software in the areas of connectivity, electrification, autonomous drive and vehicle architecture. Mentor’s distinguished track record in supplying automotive-grade electrical and electronic systems spans nearly 30 years.  

Products designated as part of the Mentor Safe ISO 26262 qualification program ship with comprehensive enablement documentation providing descriptions and best practices in the use of program-qualified products. More information on the Mentor Safe program and certified Mentor Graphics products and solutions is available at http://go.mentor.com/mentorsafe.

For More Information

Jack Taylor
jack_taylor@mentor.com
Mentor Graphics
512-560-7143

Mentor Graphics Corporation, a Siemens business, is a world leader in electronic hardware and software design solutions, providing products, consulting services, and award-winning support for the world’s most successful electronic, semiconductor, and systems companies. Corporate headquarters are located at 8005 S.W. Boeckman Road, Wilsonville, Oregon 97070-7777.  Web site: http://www.mentor.com.

Mentor Graphics, Mentor, and Veloce are registered trademarks of Mentor Graphics Corporation. All other company or product names are the registered trademark or trademarks of their respective owner.

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