New article on the Design & Reuse website by Rich Edelman and Alain Gonier from Mentor Graphics.
This article will explain a collection of techniques to allow the power of sequences with familiarity and simplicity of calling tasks.
"Providing sequences as a way to control the Verification IP allows full flexibility for powerful stimulus generation. Unfortunately using a sequence interface for Verification IP may require knowledge about SystemVerilog, randomization, constraints, object-oriented programming and detailed UVM. Many verification teams lack this knowledge. ..."
Read the entire article.