Continuing to expand its functional verification footprint across high-growth markets and applications, Mentor, a Siemens business, today announced that Arm China has selected Mentor’s Questa™ Simulation with Power Aware verification solution to handle critical tasks in the development of next-generation, low-power microcontroller (MCU) cores.
Arm China selected the Mentor Questa solution after a thorough evaluation, during which Questa demonstrated smooth bring-up and delivered a 100 percent pass rate against all target designs.
“Mentor has been an Arm partner for years, and we are pleased to extend this collaboration to our design teams at Arm China,” said William Liu, vice president of Product Development, Arm China. “We are satisfied with the compatibility and performance of Questa in complex verification environments, and we look forward to leveraging Questa solutions to develop highly successful designs for a range of fast-growing markets.”
Engineered to reduce risks associated with validating complex FPGA and SoC designs, the Questa Advanced Simulator works together with Mentor’s Questa® Power Aware Simulation solution, helping customers to implement low power silicon designs by accurately modeling low power silicon behavior early in the design cycle. With Questa Power Aware Simulator, Arm China’s design teams can verify active power management functionality at the register-transfer level (RTL) stage, enabling the exploration of alternative approaches before implementation begins, to achieve the greatest power reduction at the least cost.
“Mentor’s Questa verification tools have established a long track record of helping the world’s foremost chip designers unleash innovation and get to market faster and with greater confidence,” said Ravi Subramanian, general manager and vice president of Mentor’s IC Verification Solutions. “Mentor is honored to add Arm China to our long and growing list of industry leaders who rely on Questa verification solutions to differentiate and win in highly competitive markets.”
