WILSONVILLE, Ore., September 20, 2016 – Mentor Graphics Corporation (NASDAQ: MENT) today announced that the Veloce® emulation platform was successfully used by Starblaze Technology for a specialized high-speed, enterprise-based Solid State Drive (SSD) storage design.
Starblaze performed a detailed and lengthy analysis of the available solutions in the emulation market. The Veloce emulation platform was selected and deployed because of its superior virtualization technology and memory protocol support, rich software debug capabilities and proven track record delivering innovative emulation technology.
“The enterprise SSD market is evolving rapidly, so the SoC (System on a Chip) verification technology we use has to be perfectly aligned with our needs, especially in terms of flexibility and high-performance protocol support,” said Sky Shen, CEO of Starblaze Technology. “After using the Veloce emulation platform on our latest high-performance, enterprise SSD controller project, we are convinced that a virtual solution with extensive software debug capability is the trend for the future of emulation technology.”
In the SSD storage space, it is extremely important for design teams to study the architecture and tune the performance while finding deep hardware bugs in the pre-silicon stage. Starblaze used VirtuaLAB PCIe to provide the host connection to their design on the Veloce emulation platform. The VirtuaLAB PCIe delivers very high debug productivity, and Starblaze was able to use its Software Design Kit “as is” without any modification or adaption. In addition to using Veloce VirtuaLAB, Starblaze used Mentor’s Codelink® software debug capability to support the requirements of their embedded core software debug. In the flash interface side, the Veloce platform provides both HW and SW sparse memory solutions, which permits the necessary tradeoffs in the storage application.
ICE and Virtual: Complementary Technologies
With the Veloce Emulation platform, verification teams have access to the best of both worlds, whether using an ICE-based or virtual emulation environment. In-circuit emulation (ICE), a foundational emulation use model, remains a ‘must have’ for SoC designs that need to connect to real devices or custom hosts where physical hardware is required. The Veloce iSolve™ library offers a full complement of hardware components to build a robust ICE-based flow.
As more verification teams move from an ICE-based flow to a virtual flow, the Veloce emulation platform provides a smooth transition. The Veloce Deterministic ICE App complements ICE by eliminating the non-deterministic nature of ICE and enabling advanced verification techniques: debug, power analysis, coverage closure, and software debug.
Full virtualization is achieved with the Veloce VirtuaLAB environment, which delivers virtual ICE-equivalent, high-speed host protocols and memory devices, allowing for greater flexibility for hardware/software system-level debug, power analysis, and system performance analysis.
“The Veloce emulation platform continues to deliver a comprehensive and robust emulation platform to a broad set of markets that all have unique challenges,” said Eric Selosse, vice president and general manager of the Mentor Emulation Division. “With Starblaze’s expertise in Flash Controller and SoC design, they quickly recognized the benefits of our VirtuaLAB solution. Our success in working with them is attributed to our in-depth knowledge of the power of a virtual solution, and our timely support in deploying the Veloce emulation platform to meet their specific needs.”
About the Veloce Emulation platform
The Veloce emulation platform uses innovative software, running on powerful, qualified hardware and an extensible operating system, to target design risks faster than hardware-centric strategies. Now considered among the most versatile and powerful of verification tools, emulation greatly expands the ability of project teams to do hardware debugging, hardware/software co-verification or integration, system-level prototyping, low-power verification and power estimation and performance characterization.