Why we need to use the "parent" argument when calling explicit write from register inside regmodel , e.g : rm.ctrl.write(status, write data, .parent(this))

UVM
1

Hi,
when calling write task from a uvm_reg, the uvm_cookbook state we need to use “this” as value for the parent argument in the task.
for example:
spi_rm.ctrl.write(status, write_data, .parent(this));
why this is needed?
it looks that it works without supplying this argument. so what is the extra benefit for supplying it?

Thanks
Tal

2

In reply to tsiton:

It’s needed for more advanced sequence usage like with locks. It can also help debugging by giving you a fullname or chain of sequence names. Otherwise the read and write operations will be orphan transactions.