Why Interrupt register bits are cleared by writing 1?

I am doing Ethernet IP core verification project. While I am reading it, I found that interrupt source register bits are cleared by writing 1.
My question is, when interrupt occurs then that bit position will become 1 and if we want to clear that interrupt 1 should be written to that bit position instead of 0. Why?

What is the use of writing 1 rather than 0 to clear the interrupt?

In reply to kireeti1192:

https://www.avrfreaks.net/forum/why-are-all-interrupt-flags-cleared-writing-logical-1

In reply to dave_59:

Thanks Dave.
I have gone through this link previously. I didn’t get it completely.
So, can you please explain about this question by considering an example from basic protocols?

In reply to kireeti1192:

This is probably not the best forum for this type of question, but I believe you only want to clear the interrupt bits that you read previously as being set. It possible that other interrupts have come in since your last read and you only want to clear the interrupt bits that you serviced.