Hi, i'm a new verfication engineer.
I wonder why do we use drivers in UVM.
I know the driver's role but i think it's more easy to use driving sequence.
if we call the virtual interface in the virtual sequencer and the virtual sequencer in sequences using the p_sequencer.
Then, we can use clocks and interface controls in the sequence.
I think it's more easy to test
But many verification engineers use agents include driver.
Is it a just framework? or Are there some problems using driving sequences?