Why do I get SIGSEGV Bad Handle or Reference error when p_sequencer.some_method() is invoked?

UVM
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1

Hi,

I am trying to debug a (SIGSEGV) Bad Handle or Reference error I am getting when I invoke p_sequencer.get_full_name() in task body() of a derived uvm_sequence.

The simulator I am using is Modelsim-Altera Starter Edition 10.1d.

Error message:

** Fatal : (SIGSEGV) Bad Handle or Reference

Time : 0ps Iteration: 53 Process: /some_pkg::some_seq::some_seq_1::body/#FORK#282_dabd276 File: ./…/…/…//some_path/some_seq_lib.sv

Fatal error in Function uvm_pkg/uvm_component::get_full_name at //engineering/asic/project_groups/ADE/UVM/references/uvm-1.1_RC5/uvm-1.1/src//base/uvm_component.svh line 1885

HDL call sequence:

Stopped at ./…/…/…//some_path/some_seq_lib.sv 287 Function uvm_pkg/uvm_component::get_full_name

Source Code:


class some_seq extends uvm_sequence;
  `uvm_declare_p_sequencer(some_seqr)
...
  task body();
    forever begin
      some_item txn;
      $display(p_sequencer.get_full_name()); // line 287
      p_sequencer.get_port.get(txn); // line 288
    end
  endtask
endclass

class some_seqr extends uvm_sequencer;
...
  some_item item;
  virtual function void build_phase(uvm_phase phase);
    super.build_phase(phase);
    this.get_port = new("get_port", this);
  endfunction
endclass

class some_env extends uvm_env;
...
  some_seq     seq;
  some_agent   agt;
  some_mem_mdl sram;
  function void build_phase (uvm_phase phase);
    super.build_phase(phase);
    begin
      agt = some_agent::type_id::create("agt",this);
      seq = some_seq::type_id::create("seq");
    end
  endfunction
  function void connect_phase(uvm_phase phase);
    super.connect_phase(phase);
    this.seq.mem = sram;
  endfunction
  task run_phase(uvm_phase phase);
    fork
      this.seq.start(this.agt.sqr);
    join_none
  endtask
endclass

class some_test extends uvm_test;
...
  some_env env;
  function build_phase(uvm_phase phase);
    this.env = some_env::type_id::create("env",this);
  endfunction
endclass

Any light into why I am getting this error is most welcome.

Thanks,
Martin

2

I found the error and might as well share it here.
It is about setting up conditional code execution and making sure to properly set it in the test/env.
I placed a conditional block that requires is_active to be UVM_ACTIVE for the creation of sqr and drv.
If this is not set in the test, any access to p_sequencer will be a segmentation fault.


class some_agent extends uvm_agent;
  ...
  function void build_phase (uvm_phase phase);
    ...
    if (is_active == UVM_ACTIVE) begin
      drv = some_driver::type_id::create("drv",this);
      sqr = some_seqr::type_id::create("sqr");
    end
  endfunction : build_phase
endclass : some_agent

-Martin