What to verify besides protocol checking?

Hello VA,

I am writing some verification for a PCIe core. The protocol works just fine, but if I want to put this core inside a CPU type core, what else should be verified?

I have only written Assertions based on the PCIE protocol. There are many registers in the design that aren’t even touched by verification… but it seems like they will work under any PCIE target.

What else would you verify in a professional environment?

Thank you!!

In reply to TheGreatNed:

This is an extremely broad question. A PCIe core, or any for that matter consists of 2 interfaces: the PHY facing bus, and the local CPU interface (AHB?, Northbridge?) Like any design that needs to be verified, you start with a list of requirements for the core.

It’s also not clear if you are trying to verify a core that is already in production (like provided to you by an FPGA vendor) or something in development.

I’m using some verification IP to act as a MAC and send PIPE transactions to our PHY (which is what we are verifying). The protocol works well enough but I’m not sure how to expand the scope of the verification to make it "completely verified’.

In reply to TheGreatNed:

You have to focus on the following things:
(1) Your PHY has also a certain functionality which is defiend in a spec. You have to verify it works correctly with ‘good data’ and you have to look on the PHY when it gets wrong data from the MAC.
(2) You should never rely on zhe correctnes of your VIP. It might have some weaknesses. At least you should look on this.